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[x32] x32 should use ebx as the base pointer. 

This fixes the original issue in PR22655, but not the secondary one.

llvm-svn: 230334
This commit is contained in:
Michael Kuperstein 2015-02-24 15:27:13 +00:00
parent 867eeb5861
commit 8ffb409135
2 changed files with 35 additions and 8 deletions
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17
llvm/lib/Target/X86/X86RegisterInfo.cpp
View File

@ -66,21 +66,22 @@ X86RegisterInfo::X86RegisterInfo(const X86Subtarget &STI)
Is64Bit = Subtarget.is64Bit();
IsWin64 = Subtarget.isTargetWin64();
// Use a callee-saved register as the base pointer. These registers must
// not conflict with any ABI requirements. For example, in 32-bit mode PIC
// requires GOT in the EBX register before function calls via PLT GOT pointer.
if (Is64Bit) {
SlotSize = 8;
StackPtr = (Subtarget.isTarget64BitLP64() || Subtarget.isTargetNaCl64()) ?
X86::RSP : X86::ESP;
FramePtr = (Subtarget.isTarget64BitLP64() || Subtarget.isTargetNaCl64()) ?
X86::RBP : X86::EBP;
bool Use64BitReg =
Subtarget.isTarget64BitLP64() || Subtarget.isTargetNaCl64();
StackPtr = Use64BitReg ? X86::RSP : X86::ESP;
FramePtr = Use64BitReg ? X86::RBP : X86::EBP;
BasePtr = Use64BitReg ? X86::RBX : X86::EBX;
} else {
SlotSize = 4;
StackPtr = X86::ESP;
FramePtr = X86::EBP;
BasePtr = X86::ESI;
}
// Use a callee-saved register as the base pointer. These registers must
// not conflict with any ABI requirements. For example, in 32-bit mode PIC
// requires GOT in the EBX register before function calls via PLT GOT pointer.
BasePtr = Is64Bit ? X86::RBX : X86::ESI;
}
bool

26
llvm/test/CodeGen/X86/x86-64-baseptr.ll Normal file
View File

@ -0,0 +1,26 @@
; RUN: llc -mtriple=x86_64-pc-linux -force-align-stack -stack-alignment=32 < %s | FileCheck %s
; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -force-align-stack -stack-alignment=32 < %s | FileCheck -check-prefix=X32ABI %s
; This should run with NaCl as well ( -mtriple=x86_64-pc-nacl ) but currently doesn't due to PR22655
; Make sure the correct register gets set up as the base pointer
; This should be rbx for x64 and 64-bit NaCl and ebx for x32
; CHECK-LABEL: base
; CHECK: subq $32, %rsp
; CHECK: movq %rsp, %rbx
; X32ABI-LABEL: base
; X32ABI: subl $32, %esp
; X32ABI: movl %esp, %ebx
; NACL-LABEL: base
; NACL: subq $32, %rsp
; NACL: movq %rsp, %rbx
declare i32 @helper() nounwind
define void @base() #0 {
entry:
%k = call i32 @helper()
%a = alloca i32, i32 %k, align 4
store i32 0, i32* %a, align 4
ret void
}
attributes #0 = { nounwind uwtable "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"}