diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt index 2eba5f5667af..73cd1969cb4b 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64-el.txt @@ -24,3 +24,6 @@ 0x2d 0xd0 0xdc 0x46 # CHECK: plu.ps $f0, $f26, $f28 0x00 0x00 0xe4 0x44 # CHECK: mthc1 $4, $f0 0x00 0x00 0x64 0x44 # CHECK: mfhc1 $4, $f0 +0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26 +0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26 +0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26 diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt index c47219abc239..ce99e18f26dd 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-fp64.txt @@ -24,3 +24,6 @@ 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 0x44 0xe4 0x00 0x00 # CHECK: mthc1 $4, $f0 0x44 0x64 0x00 0x00 # CHECK: mfhc1 $4, $f0 +0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26 diff --git a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt index 73492f3055b0..a8291cfe64af 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64-el.txt @@ -24,3 +24,6 @@ 0x2d 0xd0 0xdc 0x46 # CHECK: plu.ps $f0, $f26, $f28 0x00 0x00 0xe4 0x44 # CHECK: mthc1 $4, $f0 0x00 0x00 0x64 0x44 # CHECK: mfhc1 $4, $f0 +0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26 +0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26 +0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26 diff --git a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt index 84eacd20f4ae..572faad44737 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r3/valid-fp64.txt @@ -24,3 +24,6 @@ 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 0x44 0xe4 0x00 0x00 # CHECK: mthc1 $4, $f0 0x44 0x64 0x00 0x00 # CHECK: mfhc1 $4, $f0 +0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26 diff --git a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt index 68906e83b98f..33569c0af8b0 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64-el.txt @@ -24,3 +24,6 @@ 0x2d 0xd0 0xdc 0x46 # CHECK: plu.ps $f0, $f26, $f28 0x00 0x00 0xe4 0x44 # CHECK: mthc1 $4, $f0 0x00 0x00 0x64 0x44 # CHECK: mfhc1 $4, $f0 +0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26 +0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26 +0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26 diff --git a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt index 48f31bc2827b..5116a69fbcaa 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r5/valid-fp64.txt @@ -24,3 +24,6 @@ 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 0x44 0xe4 0x00 0x00 # CHECK: mthc1 $4, $f0 0x44 0x64 0x00 0x00 # CHECK: mfhc1 $4, $f0 +0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt index be6e962f9377..6a6f5a6ab308 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt @@ -7,6 +7,7 @@ 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14 +0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767 0x67 0xc5 0xc9 0x24 # CHECK: addiu $9, $6, -15001 @@ -182,6 +183,7 @@ 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16 0x13 0x00 0xe0 0x00 # CHECK: mtlo $7 0x02 0x62 0x2e 0x46 # CHECK: mul.d $f8, $f12, $f14 +0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26 0x42 0x32 0x07 0x46 # CHECK: mul.s $f9, $f6, $f7 0x02 0x48 0xc7 0x70 # CHECK: mul $9, $6, $7 0x18 0x00 0x65 0x00 # CHECK: mult $3, $5 @@ -229,6 +231,7 @@ 0xc2 0x21 0x03 0x00 # CHECK: srl $4, $3, 7 0x06 0x10 0xa3 0x00 # CHECK: srlv $2, $3, $5 0x01 0x62 0x2e 0x46 # CHECK: sub.d $f8, $f12, $f14 +0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26 0x41 0x32 0x07 0x46 # CHECK: sub.s $f9, $f6, $f7 0x22 0x48 0xc7 0x00 # CHECK: sub $9, $6, $7 0x23 0x20 0x65 0x00 # CHECK: subu $4, $3, $5 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt index 143d9d4e9043..732b35211245 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt @@ -341,6 +341,9 @@ 0x46 0x2e 0x62 0x00 # CHECK: add.d $f8, $f12, $f14 0x46 0x2e 0x62 0x01 # CHECK: sub.d $f8, $f12, $f14 0x46 0x2e 0x62 0x02 # CHECK: mul.d $f8, $f12, $f14 +0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26 0x46 0x30 0x00 0x39 # CHECK: c.ngle.d $f0, $f16 0x46 0x30 0x14 0x81 # CHECK: sub.d $f18, $f2, $f16 0x46 0x30 0xa5 0x02 # CHECK: mul.d $f20, $f20, $f16 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-xfail-mips64r2.txt b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-xfail-mips64r2.txt index 145dcacb1f59..d28762309ad0 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-xfail-mips64r2.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-xfail-mips64r2.txt @@ -29,7 +29,6 @@ 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8 -0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 0x46 0xca 0x04 0x32 # CHECK: c.eq.ps $fcc4, $f0, $f10 0x46 0xcc 0x66 0x30 # CHECK: c.f.ps $fcc6, $f12, $f12 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20 @@ -68,5 +67,4 @@ 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 0x41 0x49 0x98 0x00 # CHECK: rdpgpr s3, t1 0x02 0xa7 0x68 0x46 # CHECK: rorv t5, a3, s5 -0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 0x41 0xcd 0x00 0x00 # CHECK: wrpgpr zero, t5 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt index e7e81d2c64ed..58ec7d52ef50 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt @@ -4,6 +4,7 @@ 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14 +0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767 0x67 0xc5 0xc9 0x24 # CHECK: addiu $9, $6, -15001 @@ -179,6 +180,7 @@ 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16 0x13 0x00 0xe0 0x00 # CHECK: mtlo $7 0x02 0x62 0x2e 0x46 # CHECK: mul.d $f8, $f12, $f14 +0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26 0x42 0x32 0x07 0x46 # CHECK: mul.s $f9, $f6, $f7 0x02 0x48 0xc7 0x70 # CHECK: mul $9, $6, $7 0x18 0x00 0x65 0x00 # CHECK: mult $3, $5 @@ -226,6 +228,7 @@ 0xc2 0x21 0x03 0x00 # CHECK: srl $4, $3, 7 0x06 0x10 0xa3 0x00 # CHECK: srlv $2, $3, $5 0x01 0x62 0x2e 0x46 # CHECK: sub.d $f8, $f12, $f14 +0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26 0x41 0x32 0x07 0x46 # CHECK: sub.s $f9, $f6, $f7 0x22 0x48 0xc7 0x00 # CHECK: sub $9, $6, $7 0x23 0x20 0x65 0x00 # CHECK: subu $4, $3, $5 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt index 77331e4fbebd..77b1ff2b7483 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt @@ -339,6 +339,9 @@ 0x46 0x2e 0x62 0x00 # CHECK: add.d $f8, $f12, $f14 0x46 0x2e 0x62 0x01 # CHECK: sub.d $f8, $f12, $f14 0x46 0x2e 0x62 0x02 # CHECK: mul.d $f8, $f12, $f14 +0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26 0x46 0x30 0x00 0x39 # CHECK: c.ngle.d $f0, $f16 0x46 0x30 0x14 0x81 # CHECK: sub.d $f18, $f2, $f16 0x46 0x30 0xa5 0x02 # CHECK: mul.d $f20, $f20, $f16 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-xfail-mips64r3.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-xfail-mips64r3.txt index 74ae59669f5c..b7f587f033d6 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-xfail-mips64r3.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-xfail-mips64r3.txt @@ -29,7 +29,6 @@ 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8 -0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 0x46 0xca 0x04 0x32 # CHECK: c.eq.ps $fcc4, $f0, $f10 0x46 0xcc 0x66 0x30 # CHECK: c.f.ps $fcc6, $f12, $f12 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20 @@ -68,5 +67,4 @@ 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 0x41 0x49 0x98 0x00 # CHECK: rdpgpr s3, t1 0x02 0xa7 0x68 0x46 # CHECK: rorv t5, a3, s5 -0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 0x41 0xcd 0x00 0x00 # CHECK: wrpgpr zero, t5 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt index 6abcdf503997..b009d2a536d3 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt @@ -4,6 +4,7 @@ 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14 +0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767 0x67 0xc5 0xc9 0x24 # CHECK: addiu $9, $6, -15001 @@ -179,6 +180,7 @@ 0x00 0x80 0xe0 0x44 # CHECK: mthc1 $zero, $f16 0x13 0x00 0xe0 0x00 # CHECK: mtlo $7 0x02 0x62 0x2e 0x46 # CHECK: mul.d $f8, $f12, $f14 +0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26 0x42 0x32 0x07 0x46 # CHECK: mul.s $f9, $f6, $f7 0x02 0x48 0xc7 0x70 # CHECK: mul $9, $6, $7 0x18 0x00 0x65 0x00 # CHECK: mult $3, $5 @@ -226,6 +228,7 @@ 0xc2 0x21 0x03 0x00 # CHECK: srl $4, $3, 7 0x06 0x10 0xa3 0x00 # CHECK: srlv $2, $3, $5 0x01 0x62 0x2e 0x46 # CHECK: sub.d $f8, $f12, $f14 +0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26 0x41 0x32 0x07 0x46 # CHECK: sub.s $f9, $f6, $f7 0x22 0x48 0xc7 0x00 # CHECK: sub $9, $6, $7 0x23 0x20 0x65 0x00 # CHECK: subu $4, $3, $5 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt index 76f187348bb6..134f338ed084 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt @@ -339,6 +339,9 @@ 0x46 0x2e 0x62 0x00 # CHECK: add.d $f8, $f12, $f14 0x46 0x2e 0x62 0x01 # CHECK: sub.d $f8, $f12, $f14 0x46 0x2e 0x62 0x02 # CHECK: mul.d $f8, $f12, $f14 +0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 +0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26 0x46 0x30 0x00 0x39 # CHECK: c.ngle.d $f0, $f16 0x46 0x30 0x14 0x81 # CHECK: sub.d $f18, $f2, $f16 0x46 0x30 0xa5 0x02 # CHECK: mul.d $f20, $f20, $f16 diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-xfail-mips64r5.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-xfail-mips64r5.txt index 2d02fca4b7c7..938015404527 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-xfail-mips64r5.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-xfail-mips64r5.txt @@ -29,7 +29,6 @@ 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8 -0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 0x46 0xca 0x04 0x32 # CHECK: c.eq.ps $fcc4, $f0, $f10 0x46 0xcc 0x66 0x30 # CHECK: c.f.ps $fcc6, $f12, $f12 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20 @@ -68,5 +67,4 @@ 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 0x41 0x49 0x98 0x00 # CHECK: rdpgpr s3, t1 0x02 0xa7 0x68 0x46 # CHECK: rorv t5, a3, s5 -0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 0x41 0xcd 0x00 0x00 # CHECK: wrpgpr zero, t5