forked from OSchip/llvm-project
[ARM][NFC] Move tail predication checks
Extract the tail predication validation checks out into their own LowOverHeadLoop method.
This commit is contained in:
Sam Parker
parent
3186b18b99
commit
8f6a67632a
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@ -121,7 +121,7 @@ namespace {
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// If this is an MVE instruction, check that we know how to use tail
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// predication with it.
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void CheckTPValidity(MachineInstr *MI) {
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void AnalyseMVEInst(MachineInstr *MI) {
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if (CannotTailPredicate)
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return;
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@ -148,6 +148,10 @@ namespace {
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!CannotTailPredicate && ML->getNumBlocks() == 1;
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}
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bool ValidateTailPredicate(MachineInstr *StartInsertPt,
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ReachingDefAnalysis *RDA,
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MachineLoopInfo *MLI);
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// Is it safe to define LR with DLS/WLS?
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// LR can be defined if it is the operand to start, because it's the same
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// value, or if it's going to be equivalent to the operand to Start.
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@ -313,6 +317,96 @@ static bool IsSafeToMove(MachineInstr *From, MachineInstr *To, ReachingDefAnalys
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return true;
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}
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bool LowOverheadLoop::ValidateTailPredicate(MachineInstr *StartInsertPt,
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ReachingDefAnalysis *RDA,
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MachineLoopInfo *MLI) {
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// All predication within the loop should be based on vctp. If the block
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// isn't predicated on entry, check whether the vctp is within the block
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// and that all other instructions are then predicated on it.
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for (auto &Block : VPTBlocks) {
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if (Block.IsPredicatedOn(VCTP))
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continue;
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if (!Block.HasNonUniformPredicate() || !isVCTP(Block.getDivergent()->MI))
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return false;
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SmallVectorImpl<PredicatedMI> &Insts = Block.getInsts();
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for (auto &PredMI : Insts) {
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if (PredMI.Predicates.count(VCTP) || isVCTP(PredMI.MI))
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continue;
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LLVM_DEBUG(dbgs() << "ARM Loops: Can't convert: " << *PredMI.MI
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<< " - which is predicated on:\n";
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for (auto *MI : PredMI.Predicates)
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dbgs() << " - " << *MI;
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);
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return false;
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}
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}
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// For tail predication, we need to provide the number of elements, instead
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// of the iteration count, to the loop start instruction. The number of
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// elements is provided to the vctp instruction, so we need to check that
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// we can use this register at InsertPt.
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Register NumElements = VCTP->getOperand(1).getReg();
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// If the register is defined within loop, then we can't perform TP.
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// TODO: Check whether this is just a mov of a register that would be
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// available.
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if (RDA->getReachingDef(VCTP, NumElements) >= 0) {
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LLVM_DEBUG(dbgs() << "ARM Loops: VCTP operand is defined in the loop.\n");
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return false;
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}
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// The element count register maybe defined after InsertPt, in which case we
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// need to try to move either InsertPt or the def so that the [w|d]lstp can
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// use the value.
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MachineBasicBlock *InsertBB = InsertPt->getParent();
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if (!RDA->isReachingDefLiveOut(InsertPt, NumElements)) {
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if (auto *ElemDef = RDA->getLocalLiveOutMIDef(InsertBB, NumElements)) {
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if (IsSafeToMove<MachineBasicBlock::reverse_iterator>(ElemDef, InsertPt, RDA)) {
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ElemDef->removeFromParent();
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InsertBB->insert(MachineBasicBlock::iterator(InsertPt), ElemDef);
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LLVM_DEBUG(dbgs() << "ARM Loops: Moved element count def: "
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<< *ElemDef);
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} else if (IsSafeToMove<MachineBasicBlock::iterator>(InsertPt, ElemDef, RDA)) {
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InsertPt->removeFromParent();
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InsertBB->insertAfter(MachineBasicBlock::iterator(ElemDef), InsertPt);
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LLVM_DEBUG(dbgs() << "ARM Loops: Moved start past: " << *ElemDef);
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} else
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return false;
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}
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}
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// Especially in the case of while loops, InsertBB may not be the
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// preheader, so we need to check that the register isn't redefined
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// before entering the loop.
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auto CannotProvideElements = [&RDA](MachineBasicBlock *MBB,
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Register NumElements) {
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// NumElements is redefined in this block.
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if (RDA->getReachingDef(&MBB->back(), NumElements) >= 0)
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return true;
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// Don't continue searching up through multiple predecessors.
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if (MBB->pred_size() > 1)
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return true;
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return false;
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};
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// First, find the block that looks like the preheader.
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MachineBasicBlock *MBB = MLI->findLoopPreheader(ML, true);
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if (!MBB)
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return false;
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// Then search backwards for a def, until we get to InsertBB.
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while (MBB != InsertBB) {
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if (CannotProvideElements(MBB, NumElements))
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return false;
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MBB = *MBB->pred_begin();
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}
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LLVM_DEBUG(dbgs() << "ARM Loops: Will use tail predication.\n");
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return true;
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}
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void LowOverheadLoop::CheckLegality(ARMBasicBlockUtils *BBUtils,
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ReachingDefAnalysis *RDA,
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MachineLoopInfo *MLI) {
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@ -361,98 +455,11 @@ void LowOverheadLoop::CheckLegality(ARMBasicBlockUtils *BBUtils,
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return;
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}
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// All predication within the loop should be based on vctp. If the block
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// isn't predicated on entry, check whether the vctp is within the block
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// and that all other instructions are then predicated on it.
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for (auto &Block : VPTBlocks) {
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if (Block.IsPredicatedOn(VCTP))
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continue;
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if (!Block.HasNonUniformPredicate() || !isVCTP(Block.getDivergent()->MI)) {
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CannotTailPredicate = true;
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return;
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}
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SmallVectorImpl<PredicatedMI> &Insts = Block.getInsts();
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for (auto &PredMI : Insts) {
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if (PredMI.Predicates.count(VCTP) || isVCTP(PredMI.MI))
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continue;
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LLVM_DEBUG(dbgs() << "ARM Loops: Can't convert: " << *PredMI.MI
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<< " - which is predicated on:\n";
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for (auto *MI : PredMI.Predicates)
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dbgs() << " - " << *MI;
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);
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CannotTailPredicate = true;
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return;
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}
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}
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// For tail predication, we need to provide the number of elements, instead
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// of the iteration count, to the loop start instruction. The number of
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// elements is provided to the vctp instruction, so we need to check that
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// we can use this register at InsertPt.
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Register NumElements = VCTP->getOperand(1).getReg();
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// If the register is defined within loop, then we can't perform TP.
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// TODO: Check whether this is just a mov of a register that would be
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// available.
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if (RDA->getReachingDef(VCTP, NumElements) >= 0) {
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CannotTailPredicate = true;
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return;
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}
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// The element count register maybe defined after InsertPt, in which case we
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// need to try to move either InsertPt or the def so that the [w|d]lstp can
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// use the value.
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MachineBasicBlock *InsertBB = InsertPt->getParent();
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if (!RDA->isReachingDefLiveOut(InsertPt, NumElements)) {
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if (auto *ElemDef = RDA->getLocalLiveOutMIDef(InsertBB, NumElements)) {
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if (IsSafeToMove<MachineBasicBlock::reverse_iterator>(ElemDef, InsertPt, RDA)) {
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ElemDef->removeFromParent();
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InsertBB->insert(MachineBasicBlock::iterator(InsertPt), ElemDef);
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LLVM_DEBUG(dbgs() << "ARM Loops: Moved element count def: "
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<< *ElemDef);
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} else if (IsSafeToMove<MachineBasicBlock::iterator>(InsertPt, ElemDef, RDA)) {
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InsertPt->removeFromParent();
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InsertBB->insertAfter(MachineBasicBlock::iterator(ElemDef), InsertPt);
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LLVM_DEBUG(dbgs() << "ARM Loops: Moved start past: " << *ElemDef);
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} else {
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CannotTailPredicate = true;
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return;
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}
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}
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}
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// Especially in the case of while loops, InsertBB may not be the
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// preheader, so we need to check that the register isn't redefined
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// before entering the loop.
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auto CannotProvideElements = [&RDA](MachineBasicBlock *MBB,
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Register NumElements) {
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// NumElements is redefined in this block.
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if (RDA->getReachingDef(&MBB->back(), NumElements) >= 0)
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return true;
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// Don't continue searching up through multiple predecessors.
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if (MBB->pred_size() > 1)
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return true;
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return false;
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};
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// First, find the block that looks like the preheader.
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MachineBasicBlock *MBB = MLI->findLoopPreheader(ML, true);
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if (!MBB) {
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CannotTailPredicate = true;
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return;
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}
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// Then search backwards for a def, until we get to InsertBB.
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while (MBB != InsertBB) {
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CannotTailPredicate = CannotProvideElements(MBB, NumElements);
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if (CannotTailPredicate)
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return;
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MBB = *MBB->pred_begin();
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}
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LLVM_DEBUG(dbgs() << "ARM Loops: Will use tail predication.\n");
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assert(ML->getBlocks().size() == 1 &&
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"Shouldn't be processing a loop with more than one block");
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CannotTailPredicate = !ValidateTailPredicate(InsertPt, RDA, MLI);
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LLVM_DEBUG(if (CannotTailPredicate)
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dbgs() << "ARM Loops: Couldn't validate tail predicate.\n");
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}
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bool LowOverheadLoop::RecordVPTBlocks(MachineInstr* MI) {
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@ -601,7 +608,7 @@ bool ARMLowOverheadLoops::ProcessLoop(MachineLoop *ML) {
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} else {
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// Record VPR defs and build up their corresponding vpt blocks.
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// Check we know how to tail predicate any mve instructions.
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LoLoop.CheckTPValidity(&MI);
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LoLoop.AnalyseMVEInst(&MI);
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}
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// We need to ensure that LR is not used or defined inbetween LoopDec and
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