forked from OSchip/llvm-project
DetectDeadLanes: Cleanup, assert on some impossible cases.
llvm-svn: 268814
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5d105a977e
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@ -76,7 +76,7 @@ private:
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void transferUsedLanesStep(const MachineOperand &Def, LaneBitmask UsedLanes);
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/// Given a use regiser operand \p Use and a mask of defined lanes, check
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/// if the operand belongs to a lowerToCopies() instruction, transfer the
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/// if the operand belongs to a lowersToCopies() instruction, transfer the
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/// mask to the def and put the instruction into the worklist.
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void transferDefinedLanesStep(const MachineOperand &Use,
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LaneBitmask DefinedLanes);
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@ -85,7 +85,7 @@ private:
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/// of COPY-like instruction, determine which lanes are defined at the output
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/// operand \p Def.
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LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
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LaneBitmask DefinedLanes);
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LaneBitmask DefinedLanes) const;
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LaneBitmask determineInitialDefinedLanes(unsigned Reg);
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LaneBitmask determineInitialUsedLanes(unsigned Reg);
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@ -294,8 +294,7 @@ void DetectDeadLanes::transferDefinedLanesStep(const MachineOperand &Use,
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}
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LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,
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unsigned OpNum,
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LaneBitmask DefinedLanes) {
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unsigned OpNum, LaneBitmask DefinedLanes) const {
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const MachineInstr &MI = *Def.getParent();
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// Translate DefinedLanes if necessary.
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switch (MI.getOpcode()) {
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@ -330,8 +329,8 @@ LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,
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llvm_unreachable("function must be called with COPY-like instruction");
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}
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unsigned SubIdx = Def.getSubReg();
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DefinedLanes = TRI->composeSubRegIndexLaneMask(SubIdx, DefinedLanes);
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assert(Def.getSubReg() == 0 &&
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"Should not have subregister defs in machine SSA phase");
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DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg());
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return DefinedLanes;
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}
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@ -396,9 +395,9 @@ LaneBitmask DetectDeadLanes::determineInitialDefinedLanes(unsigned Reg) {
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if (DefMI.isImplicitDef() || Def.isDead())
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return 0;
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unsigned SubReg = Def.getSubReg();
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return SubReg != 0 ? TRI->getSubRegIndexLaneMask(SubReg)
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: MRI->getMaxLaneMaskForVReg(Reg);
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assert(Def.getSubReg() == 0 &&
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"Should not have subregister defs in machine SSA phase");
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return MRI->getMaxLaneMaskForVReg(Reg);
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}
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LaneBitmask DetectDeadLanes::determineInitialUsedLanes(unsigned Reg) {
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