maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

DetectDeadLanes: Cleanup, assert on some impossible cases. 

llvm-svn: 268814
This commit is contained in:
Matthias Braun 2016-05-06 22:43:46 +00:00
parent 5d105a977e
commit 8f429ead58
1 changed files with 8 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
llvm/lib/CodeGen/DetectDeadLanes.cpp
View File

@ -76,7 +76,7 @@ private:
void transferUsedLanesStep(const MachineOperand &Def, LaneBitmask UsedLanes); void transferUsedLanesStep(const MachineOperand &Def, LaneBitmask UsedLanes);
/// Given a use regiser operand \p Use and a mask of defined lanes, check /// Given a use regiser operand \p Use and a mask of defined lanes, check
/// if the operand belongs to a lowerToCopies() instruction, transfer the /// if the operand belongs to a lowersToCopies() instruction, transfer the
/// mask to the def and put the instruction into the worklist. /// mask to the def and put the instruction into the worklist.
void transferDefinedLanesStep(const MachineOperand &Use, void transferDefinedLanesStep(const MachineOperand &Use,
LaneBitmask DefinedLanes); LaneBitmask DefinedLanes);
@ -85,7 +85,7 @@ private:
/// of COPY-like instruction, determine which lanes are defined at the output /// of COPY-like instruction, determine which lanes are defined at the output
/// operand \p Def. /// operand \p Def.
LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum, LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
LaneBitmask DefinedLanes); LaneBitmask DefinedLanes) const;
LaneBitmask determineInitialDefinedLanes(unsigned Reg); LaneBitmask determineInitialDefinedLanes(unsigned Reg);
LaneBitmask determineInitialUsedLanes(unsigned Reg); LaneBitmask determineInitialUsedLanes(unsigned Reg);
@ -294,8 +294,7 @@ void DetectDeadLanes::transferDefinedLanesStep(const MachineOperand &Use,
} }
LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def, LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,
unsigned OpNum, unsigned OpNum, LaneBitmask DefinedLanes) const {
LaneBitmask DefinedLanes) {
const MachineInstr &MI = *Def.getParent(); const MachineInstr &MI = *Def.getParent();
// Translate DefinedLanes if necessary. // Translate DefinedLanes if necessary.
switch (MI.getOpcode()) { switch (MI.getOpcode()) {
@ -330,8 +329,8 @@ LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,
llvm_unreachable("function must be called with COPY-like instruction"); llvm_unreachable("function must be called with COPY-like instruction");
} }
unsigned SubIdx = Def.getSubReg(); assert(Def.getSubReg() == 0 &&
DefinedLanes = TRI->composeSubRegIndexLaneMask(SubIdx, DefinedLanes); "Should not have subregister defs in machine SSA phase");
DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg()); DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg());
return DefinedLanes; return DefinedLanes;
} }
@ -396,9 +395,9 @@ LaneBitmask DetectDeadLanes::determineInitialDefinedLanes(unsigned Reg) {
if (DefMI.isImplicitDef() || Def.isDead()) if (DefMI.isImplicitDef() || Def.isDead())
return 0; return 0;
unsigned SubReg = Def.getSubReg(); assert(Def.getSubReg() == 0 &&
return SubReg != 0 ? TRI->getSubRegIndexLaneMask(SubReg) "Should not have subregister defs in machine SSA phase");
: MRI->getMaxLaneMaskForVReg(Reg); return MRI->getMaxLaneMaskForVReg(Reg);
} }
LaneBitmask DetectDeadLanes::determineInitialUsedLanes(unsigned Reg) { LaneBitmask DetectDeadLanes::determineInitialUsedLanes(unsigned Reg) {