forked from OSchip/llvm-project
X86: Add a description of the Intel Atom Silvermont CPU.
Currently this is just the atom model with SSE4.2 enabled. llvm-svn: 189669
This commit is contained in:
parent
fcdab16d24
commit
8f429384b5
|
@ -265,6 +265,11 @@ std::string sys::getHostCPUName() {
|
|||
case 54: // 32 nm Atom Midview
|
||||
return "atom";
|
||||
|
||||
case 55: // Intel Atom Silvermont processors
|
||||
case 74:
|
||||
case 77:
|
||||
return "slm";
|
||||
|
||||
default: return (Em64T) ? "x86-64" : "i686";
|
||||
}
|
||||
case 15: {
|
||||
|
|
|
@ -206,6 +206,15 @@ def : ProcessorModel<"atom", AtomModel,
|
|||
FeatureLEAUsesAG,
|
||||
FeaturePadShortFunctions]>;
|
||||
|
||||
// Silvermont.
|
||||
def : ProcessorModel<"slm", AtomModel,
|
||||
[ProcIntelAtom, FeatureSSE42, FeatureCMPXCHG16B,
|
||||
FeatureMOVBE, FeatureSlowBTMem, FeatureLeaForSP,
|
||||
FeatureSlowDivide,
|
||||
FeatureCallRegIndirect,
|
||||
FeatureLEAUsesAG,
|
||||
FeaturePadShortFunctions]>;
|
||||
|
||||
// "Arrandale" along with corei3 and corei5
|
||||
def : ProcessorModel<"corei7", SandyBridgeModel,
|
||||
[FeatureSSE42, FeatureCMPXCHG16B, FeatureSlowBTMem,
|
||||
|
|
Loading…
Reference in New Issue