forked from OSchip/llvm-project
builtins: add it blocks for Thumb-2
Add the missing IT-blocks for Thumb-2 compilation for code paths exercised by older ARM CPUs. This should fix the buildbots. llvm-svn: 211035
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@ -99,9 +99,16 @@ DEFINE_COMPILERRT_FUNCTION(__udivmodsi4)
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#define IMM #
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#define block(shift) \
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cmp r0, r1, lsl IMM shift; \
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addhs r3, r3, IMM (1 << shift); \
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#if __ARM_ARCH_ISA_THUMB == 2
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#define ITT itt
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#else
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#define ITT @
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#endif
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#define block(shift) \
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cmp r0, r1, lsl IMM shift; \
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ITT hs; \
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addhs r3, r3, IMM (1 << shift); \
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subhs r0, r0, r1, lsl IMM shift
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block(31)
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@ -20,6 +20,14 @@
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.thumb
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#endif
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#if __ARM_ARCH_ISA_THUMB == 2
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#define IT it
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#define ITT itt
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#else
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#define IT @
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#define ITT @
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#endif
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.p2align 2
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DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_uidiv, __udivsi3)
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DEFINE_COMPILERRT_FUNCTION(__udivsi3)
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@ -32,9 +40,12 @@ DEFINE_COMPILERRT_FUNCTION(__udivsi3)
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bx lr
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#else
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cmp r1, #1
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IT cc
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bcc LOCAL_LABEL(divby0)
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IT eq
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JMPc(lr, eq)
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cmp r0, r1
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ITT cc
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movcc r0, #0
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JMPc(lr, cc)
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/*
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@ -97,9 +108,10 @@ DEFINE_COMPILERRT_FUNCTION(__udivsi3)
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#define IMM #
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#define block(shift) \
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cmp r0, r1, lsl IMM shift; \
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addhs r3, r3, IMM (1 << shift); \
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#define block(shift) \
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cmp r0, r1, lsl IMM shift; \
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ITT hs; \
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addhs r3, r3, IMM (1 << shift); \
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subhs r0, r0, r1, lsl IMM shift
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block(31)
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@ -20,6 +20,14 @@
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.thumb
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#endif
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#if __ARM_ARCH_ISA_THUMB == 2
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#define IT it
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#define ITT itt
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#else
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#define IT @
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#define ITT @
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#endif
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.p2align 2
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DEFINE_COMPILERRT_FUNCTION(__umodsi3)
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#if __ARM_ARCH_EXT_IDIV__
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@ -33,9 +41,11 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3)
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#else
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cmp r1, #1
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bcc LOCAL_LABEL(divby0)
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ITT eq
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moveq r0, #0
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JMPc(lr, eq)
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cmp r0, r1
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IT cc
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JMPc(lr, cc)
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/*
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* Implement division using binary long division algorithm.
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@ -93,8 +103,9 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3)
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#define IMM #
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#define block(shift) \
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cmp r0, r1, lsl IMM shift; \
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#define block(shift) \
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cmp r0, r1, lsl IMM shift; \
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IT hs; \
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subhs r0, r0, r1, lsl IMM shift
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block(31)
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