forked from OSchip/llvm-project
[X86] computeKnownBitsForTargetNode - add BEXTR support (PR39153)
Add a KnownBits::extractBits helper
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@ -157,6 +157,13 @@ public:
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return KnownBits(Zero.zextOrTrunc(BitWidth), One.zextOrTrunc(BitWidth));
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}
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/// Return a KnownBits with the extracted bits
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/// [bitPosition,bitPosition+numBits).
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KnownBits extractBits(unsigned NumBits, unsigned BitPosition) const {
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return KnownBits(Zero.extractBits(NumBits, BitPosition),
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One.extractBits(NumBits, BitPosition));
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}
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/// Returns the minimum number of trailing zero bits.
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unsigned countMinTrailingZeros() const {
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return Zero.countTrailingOnes();
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@ -32721,6 +32721,28 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
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Known.Zero &= Known2.Zero;
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break;
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}
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case X86ISD::BEXTR: {
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SDValue Op0 = Op.getOperand(0);
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SDValue Op1 = Op.getOperand(1);
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if (auto* Cst1 = dyn_cast<ConstantSDNode>(Op1)) {
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unsigned Shift = Cst1->getAPIntValue().extractBitsAsZExtValue(8, 0);
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unsigned Length = Cst1->getAPIntValue().extractBitsAsZExtValue(8, 8);
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// If the length is 0, the result is 0.
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if (Length == 0) {
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Known.setAllZero();
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break;
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}
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if ((Shift + Length) <= BitWidth) {
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Known = DAG.computeKnownBits(Op0, Depth + 1);
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Known = Known.extractBits(Length, Shift);
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Known = Known.zextOrTrunc(BitWidth, true /* ExtBitsAreKnownZero */);
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}
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}
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break;
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}
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}
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// Handle target shuffles.
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@ -62,7 +62,7 @@ define float @bextr_uitofp(i32 %x, i32 %y) {
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; X64: # %bb.0:
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; X64-NEXT: movl $3855, %eax # imm = 0xF0F
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; X64-NEXT: bextrl %eax, %edi, %eax
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; X64-NEXT: cvtsi2ss %rax, %xmm0
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; X64-NEXT: cvtsi2ss %eax, %xmm0
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; X64-NEXT: retq
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%1 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 3855)
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%2 = uitofp i32 %1 to float
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