forked from OSchip/llvm-project
[InstCombine] Add tests showing failure to fold mul(abs(x),abs(x)) -> mul(x,x) (PR39476)
Includes abs() and nabs() variants
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@ -606,3 +606,95 @@ define i32 @mul_div_select(i32 %x, i32 %y, i1 %c) {
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%mul = mul i32 %sel, %y
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ret i32 %mul
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}
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; fold mul(abs(x),abs(x)) -> mul(x,x)
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define i31 @combine_mul_abs_i31(i31 %0) {
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; CHECK-LABEL: @combine_mul_abs_i31(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i31 [[TMP0:%.*]], 0
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; CHECK-NEXT: [[S:%.*]] = sub nsw i31 0, [[TMP0]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i31 [[S]], i31 [[TMP0]]
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; CHECK-NEXT: [[M:%.*]] = mul i31 [[R]], [[R]]
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; CHECK-NEXT: ret i31 [[M]]
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;
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%c = icmp slt i31 %0, 0
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%s = sub nsw i31 0, %0
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%r = select i1 %c, i31 %s, i31 %0
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%m = mul i31 %r, %r
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ret i31 %m
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}
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define i32 @combine_mul_abs_i32(i32 %0) {
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; CHECK-LABEL: @combine_mul_abs_i32(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP0:%.*]], 0
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; CHECK-NEXT: [[S:%.*]] = sub nsw i32 0, [[TMP0]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[S]], i32 [[TMP0]]
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; CHECK-NEXT: [[M:%.*]] = mul i32 [[R]], [[R]]
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; CHECK-NEXT: ret i32 [[M]]
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;
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%c = icmp slt i32 %0, 0
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%s = sub nsw i32 0, %0
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%r = select i1 %c, i32 %s, i32 %0
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%m = mul i32 %r, %r
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ret i32 %m
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}
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define <4 x i32> @combine_mul_abs_v4i32(<4 x i32> %0) {
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; CHECK-LABEL: @combine_mul_abs_v4i32(
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; CHECK-NEXT: [[C:%.*]] = icmp slt <4 x i32> [[TMP0:%.*]], zeroinitializer
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; CHECK-NEXT: [[S:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP0]]
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; CHECK-NEXT: [[R:%.*]] = select <4 x i1> [[C]], <4 x i32> [[S]], <4 x i32> [[TMP0]]
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; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[R]], [[R]]
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; CHECK-NEXT: ret <4 x i32> [[M]]
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;
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%c = icmp slt <4 x i32> %0, zeroinitializer
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%s = sub nsw <4 x i32> zeroinitializer, %0
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%r = select <4 x i1> %c, <4 x i32> %s, <4 x i32> %0
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%m = mul <4 x i32> %r, %r
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ret <4 x i32> %m
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}
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; fold mul(nabs(x),nabs(x)) -> mul(x,x)
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define i31 @combine_mul_nabs_i31(i31 %0) {
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; CHECK-LABEL: @combine_mul_nabs_i31(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i31 [[TMP0:%.*]], 0
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; CHECK-NEXT: [[S:%.*]] = sub nsw i31 0, [[TMP0]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i31 [[TMP0]], i31 [[S]]
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; CHECK-NEXT: [[M:%.*]] = mul i31 [[R]], [[R]]
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; CHECK-NEXT: ret i31 [[M]]
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;
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%c = icmp slt i31 %0, 0
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%s = sub nsw i31 0, %0
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%r = select i1 %c, i31 %0, i31 %s
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%m = mul i31 %r, %r
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ret i31 %m
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}
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define i32 @combine_mul_nabs_i32(i32 %0) {
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; CHECK-LABEL: @combine_mul_nabs_i32(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP0:%.*]], 0
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; CHECK-NEXT: [[S:%.*]] = sub nsw i32 0, [[TMP0]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[TMP0]], i32 [[S]]
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; CHECK-NEXT: [[M:%.*]] = mul i32 [[R]], [[R]]
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; CHECK-NEXT: ret i32 [[M]]
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;
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%c = icmp slt i32 %0, 0
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%s = sub nsw i32 0, %0
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%r = select i1 %c, i32 %0, i32 %s
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%m = mul i32 %r, %r
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ret i32 %m
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}
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define <4 x i32> @combine_mul_nabs_v4i32(<4 x i32> %0) {
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; CHECK-LABEL: @combine_mul_nabs_v4i32(
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; CHECK-NEXT: [[C:%.*]] = icmp slt <4 x i32> [[TMP0:%.*]], zeroinitializer
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; CHECK-NEXT: [[S:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP0]]
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; CHECK-NEXT: [[R:%.*]] = select <4 x i1> [[C]], <4 x i32> [[TMP0]], <4 x i32> [[S]]
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; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[R]], [[R]]
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; CHECK-NEXT: ret <4 x i32> [[M]]
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;
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%c = icmp slt <4 x i32> %0, zeroinitializer
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%s = sub nsw <4 x i32> zeroinitializer, %0
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%r = select <4 x i1> %c, <4 x i32> %0, <4 x i32> %s
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%m = mul <4 x i32> %r, %r
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ret <4 x i32> %m
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}
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