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[PowerPC] Separate Features that are known to be Power9 specific from Future CPU 

The Power 9 CPU has some features that are unlikely to be passed on to future
versions of the CPU. This patch separates this out so that future CPU does not
inherit them.

Differential Revision: https://reviews.llvm.org/D70466
This commit is contained in:
Stefan Pintilie 2019-11-27 15:38:05 -06:00
parent 549ff601f0
commit 8e84c9ae99
2 changed files with 29 additions and 4 deletions
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17
llvm/lib/Target/PowerPC/PPC.td
View File

@ -237,13 +237,22 @@ def ProcessorFeatures {
list<SubtargetFeature> Power8FeatureList =
!listconcat(Power7FeatureList, Power8SpecificFeatures);
list<SubtargetFeature> Power9SpecificFeatures =
[DirectivePwr9, FeatureP9Altivec, FeatureP9Vector, FeatureISA3_0,
FeatureVectorsUseTwoUnits, FeaturePPCPreRASched, FeaturePPCPostRASched];
[DirectivePwr9, FeatureP9Altivec, FeatureP9Vector, FeatureISA3_0];
// Some features are unique to Power9 and there is no reason to assume
// they will be part of any future CPUs. One example is the narrower
// dispatch for vector operations than scalar ones. For the time being,
// this list also includes scheduling-related features since we do not have
// enough info to create custom scheduling strategies for future CPUs.
list<SubtargetFeature> Power9OnlyFeatures =
[FeatureVectorsUseTwoUnits, FeaturePPCPreRASched, FeaturePPCPostRASched];
list<SubtargetFeature> Power9FeatureList =
!listconcat(Power8FeatureList, Power9SpecificFeatures);
list<SubtargetFeature> Power9ImplList =
!listconcat(Power9FeatureList, Power9OnlyFeatures);
// For future CPU we assume that all of the existing features from Power 9
// still exist.
// still exist with the exception of those we know are Power 9 specific.
list<SubtargetFeature> FutureSpecificFeatures =
[];
list<SubtargetFeature> FutureFeatureList =
@ -449,7 +458,7 @@ def : ProcessorModel<"pwr6x", G5Model,
FeatureMFTB, DeprecatedDST]>;
def : ProcessorModel<"pwr7", P7Model, ProcessorFeatures.Power7FeatureList>;
def : ProcessorModel<"pwr8", P8Model, ProcessorFeatures.Power8FeatureList>;
def : ProcessorModel<"pwr9", P9Model, ProcessorFeatures.Power9FeatureList>;
def : ProcessorModel<"pwr9", P9Model, ProcessorFeatures.Power9ImplList>;
// No scheduler model for future CPU.
def : ProcessorModel<"future", NoSchedModel,
ProcessorFeatures.FutureFeatureList>;

16
llvm/test/Analysis/CostModel/PowerPC/future-cost-model.ll Normal file
View File

@ -0,0 +1,16 @@
; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=future | FileCheck %s --check-prefix=FUTURE
; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr9 | FileCheck %s --check-prefix=PWR9
define void @test(i16 %p1, i16 %p2, <4 x i16> %p3, <4 x i16> %p4) {
%i1 = add i16 %p1, %p2
%v1 = add <4 x i16> %p3, %p4
ret void
; FUTURE: cost of 1 {{.*}} add
; FUTURE: cost of 1 {{.*}} add
; PWR9: cost of 1 {{.*}} add
; PWR9: cost of 2 {{.*}} add
}