forked from OSchip/llvm-project
AMDGPU/GlobalISel: Mark 32/64-bit G_FCMP as legal
Patch by Tom Stellard llvm-svn: 326465
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dd022ce064
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@ -54,6 +54,10 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
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setAction({G_FADD, S32}, Legal);
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setAction({G_FCMP, S1}, Legal);
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setAction({G_FCMP, 1, S32}, Legal);
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setAction({G_FCMP, 1, S64}, Legal);
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setAction({G_FMUL, S32}, Legal);
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setAction({G_FPTOSI, S32}, Legal);
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@ -0,0 +1,35 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
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---
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name: test_fcmp_f32
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_fcmp_f32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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%0(s32) = G_CONSTANT i32 0
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%1(s32) = COPY $vgpr0
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%2(s1) = G_FCMP floatpred(uge), %0, %1
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...
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---
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name: test_fcmp_f64
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: test_fcmp_f64
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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%0(s64) = G_CONSTANT i64 0
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%1(s64) = COPY $vgpr0_vgpr1
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%2(s1) = G_FCMP floatpred(uge), %0, %1
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...
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