forked from OSchip/llvm-project
[Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment of the element type and the number of elements. In fact, it is the product of these two values. The problem is that for vectors of N x i1, this will return the alignment of N bytes, since the alignment of i1 is 8 bits. The vector types of vNi1 should be aligned to N bits instead. Provide explicit alignment for HVX vectors to avoid such complications. llvm-svn: 260680
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@ -5697,9 +5697,12 @@ class HexagonTargetInfo : public TargetInfo {
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public:
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HexagonTargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
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BigEndian = false;
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DataLayoutString = "e-m:e-p:32:32:32-"
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"i64:64:64-i32:32:32-i16:16:16-i1:8:8-"
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"f64:64:64-f32:32:32-v64:64:64-v32:32:32-a:0-n16:32";
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// Specify the vector alignment explicitly. For v512x1, the calculated
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// alignment would be 512*alignment(i1), which is 512 bytes, instead of
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// the required minimum of 64 bytes.
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DataLayoutString = "e-m:e-p:32:32:32-a:0-n16:32-"
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"i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
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"v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048";
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SizeType = UnsignedInt;
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PtrDiffType = SignedInt;
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IntPtrType = SignedInt;
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@ -157,7 +157,7 @@
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// RUN: %clang_cc1 -triple hexagon-unknown -o - -emit-llvm %s | \
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// RUN: FileCheck %s -check-prefix=HEXAGON
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// HEXAGON: target datalayout = "e-m:e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a:0-n16:32"
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// HEXAGON: target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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// RUN: %clang_cc1 -triple s390x-unknown -o - -emit-llvm %s | \
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// RUN: FileCheck %s -check-prefix=SYSTEMZ
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