forked from OSchip/llvm-project
[CGP] Regenerate test checks (NFC)
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1236b66a98
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -codegenprepare < %s | FileCheck %s --check-prefix=SLOW
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; RUN: opt -S -codegenprepare -mattr=+bmi < %s | FileCheck %s --check-prefix=FAST_TZ
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; RUN: opt -S -codegenprepare -mattr=+lzcnt < %s | FileCheck %s --check-prefix=FAST_LZ
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@ -6,49 +7,73 @@ target triple = "x86_64-unknown-unknown"
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target datalayout = "e-n32:64"
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; If the intrinsic is cheap, nothing should change.
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; If the intrinsic is expensive, check if the input is zero to avoid the call.
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; If the intrinsic is expensive, check if the input is zero to avoid the call.
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; This is undoing speculation that may have been created by SimplifyCFG + InstCombine.
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define i64 @cttz(i64 %A) {
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; SLOW-LABEL: @cttz(
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; SLOW-NEXT: entry:
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; SLOW-NEXT: [[CMPZ:%.*]] = icmp eq i64 [[A:%.*]], 0
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; SLOW-NEXT: br i1 [[CMPZ]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; SLOW: cond.false:
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; SLOW-NEXT: [[Z:%.*]] = call i64 @llvm.cttz.i64(i64 [[A]], i1 true)
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; SLOW-NEXT: br label [[COND_END]]
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; SLOW: cond.end:
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; SLOW-NEXT: [[CTZ:%.*]] = phi i64 [ 64, [[ENTRY:%.*]] ], [ [[Z]], [[COND_FALSE]] ]
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; SLOW-NEXT: ret i64 [[CTZ]]
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;
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; FAST_TZ-LABEL: @cttz(
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; FAST_TZ-NEXT: entry:
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; FAST_TZ-NEXT: [[Z:%.*]] = call i64 @llvm.cttz.i64(i64 [[A:%.*]], i1 false)
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; FAST_TZ-NEXT: ret i64 [[Z]]
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;
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; FAST_LZ-LABEL: @cttz(
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; FAST_LZ-NEXT: entry:
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; FAST_LZ-NEXT: [[CMPZ:%.*]] = icmp eq i64 [[A:%.*]], 0
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; FAST_LZ-NEXT: br i1 [[CMPZ]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; FAST_LZ: cond.false:
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; FAST_LZ-NEXT: [[Z:%.*]] = call i64 @llvm.cttz.i64(i64 [[A]], i1 true)
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; FAST_LZ-NEXT: br label [[COND_END]]
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; FAST_LZ: cond.end:
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; FAST_LZ-NEXT: [[CTZ:%.*]] = phi i64 [ 64, [[ENTRY:%.*]] ], [ [[Z]], [[COND_FALSE]] ]
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; FAST_LZ-NEXT: ret i64 [[CTZ]]
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;
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entry:
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%z = call i64 @llvm.cttz.i64(i64 %A, i1 false)
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ret i64 %z
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; SLOW-LABEL: @cttz(
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; SLOW: entry:
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; SLOW: %cmpz = icmp eq i64 %A, 0
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; SLOW: br i1 %cmpz, label %cond.end, label %cond.false
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; SLOW: cond.false:
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; SLOW: %z = call i64 @llvm.cttz.i64(i64 %A, i1 true)
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; SLOW: br label %cond.end
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; SLOW: cond.end:
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; SLOW: %ctz = phi i64 [ 64, %entry ], [ %z, %cond.false ]
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; SLOW: ret i64 %ctz
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; FAST_TZ-LABEL: @cttz(
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; FAST_TZ: %z = call i64 @llvm.cttz.i64(i64 %A, i1 false)
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; FAST_TZ: ret i64 %z
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}
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define i64 @ctlz(i64 %A) {
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; SLOW-LABEL: @ctlz(
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; SLOW-NEXT: entry:
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; SLOW-NEXT: [[CMPZ:%.*]] = icmp eq i64 [[A:%.*]], 0
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; SLOW-NEXT: br i1 [[CMPZ]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; SLOW: cond.false:
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; SLOW-NEXT: [[Z:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A]], i1 true)
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; SLOW-NEXT: br label [[COND_END]]
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; SLOW: cond.end:
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; SLOW-NEXT: [[CTZ:%.*]] = phi i64 [ 64, [[ENTRY:%.*]] ], [ [[Z]], [[COND_FALSE]] ]
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; SLOW-NEXT: ret i64 [[CTZ]]
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;
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; FAST_TZ-LABEL: @ctlz(
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; FAST_TZ-NEXT: entry:
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; FAST_TZ-NEXT: [[CMPZ:%.*]] = icmp eq i64 [[A:%.*]], 0
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; FAST_TZ-NEXT: br i1 [[CMPZ]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
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; FAST_TZ: cond.false:
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; FAST_TZ-NEXT: [[Z:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A]], i1 true)
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; FAST_TZ-NEXT: br label [[COND_END]]
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; FAST_TZ: cond.end:
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; FAST_TZ-NEXT: [[CTZ:%.*]] = phi i64 [ 64, [[ENTRY:%.*]] ], [ [[Z]], [[COND_FALSE]] ]
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; FAST_TZ-NEXT: ret i64 [[CTZ]]
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;
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; FAST_LZ-LABEL: @ctlz(
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; FAST_LZ-NEXT: entry:
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; FAST_LZ-NEXT: [[Z:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A:%.*]], i1 false)
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; FAST_LZ-NEXT: ret i64 [[Z]]
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;
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entry:
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%z = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
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ret i64 %z
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; SLOW-LABEL: @ctlz(
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; SLOW: entry:
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; SLOW: %cmpz = icmp eq i64 %A, 0
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; SLOW: br i1 %cmpz, label %cond.end, label %cond.false
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; SLOW: cond.false:
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; SLOW: %z = call i64 @llvm.ctlz.i64(i64 %A, i1 true)
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; SLOW: br label %cond.end
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; SLOW: cond.end:
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; SLOW: %ctz = phi i64 [ 64, %entry ], [ %z, %cond.false ]
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; SLOW: ret i64 %ctz
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; FAST_LZ-LABEL: @ctlz(
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; FAST_LZ: %z = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
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; FAST_LZ: ret i64 %z
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}
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declare i64 @llvm.cttz.i64(i64, i1)
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