forked from OSchip/llvm-project
[AMDGPU] Add address space based alias analysis pass
This is direct port of HSAILAliasAnalysis pass, just cleaned for style and renamed. Differential Revision: https://reviews.llvm.org/D31103 llvm-svn: 298172
This commit is contained in:
Stanislav Mekhanoshin
parent
0f5063c754
commit
8e45acfc38
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@ -119,6 +119,9 @@ extern char &SIDebuggerInsertNopsID;
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void initializeSIInsertWaitsPass(PassRegistry&);
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extern char &SIInsertWaitsID;
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ImmutablePass *createAMDGPUAAWrapperPass();
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void initializeAMDGPUAAWrapperPassPass(PassRegistry&);
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Target &getTheAMDGPUTarget();
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Target &getTheGCNTarget();
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@ -0,0 +1,117 @@
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//===- AMDGPUAliasAnalysis ---------------------------------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This is the AMGPU address space based alias analysis pass.
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "AMDGPUAliasAnalysis.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/Analysis/Passes.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Pass.h"
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using namespace llvm;
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#define DEBUG_TYPE "amdgpu-aa"
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// Register this pass...
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char AMDGPUAAWrapperPass::ID = 0;
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INITIALIZE_PASS(AMDGPUAAWrapperPass, "amdgpu-aa",
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"AMDGPU Address space based Alias Analysis", false, true)
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ImmutablePass *llvm::createAMDGPUAAWrapperPass() {
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return new AMDGPUAAWrapperPass();
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}
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void AMDGPUAAWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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}
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AliasResult AMDGPUAAResult::alias(const MemoryLocation &LocA,
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const MemoryLocation &LocB) {
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// This array is indexed by the AMDGPUAS::AddressSpaces
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// enum elements PRIVATE_ADDRESS ... to FLAT_ADDRESS
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// see "llvm/Transforms/AMDSPIRUtils.h"
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static const AliasResult ASAliasRules[5][5] = {
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/* Private Global Constant Group Flat */
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/* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , MayAlias},
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/* Global */ {NoAlias , MayAlias, NoAlias , NoAlias , MayAlias},
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/* Constant */ {NoAlias , NoAlias , MayAlias, NoAlias , MayAlias},
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/* Group */ {NoAlias , NoAlias , NoAlias , MayAlias, MayAlias},
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/* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias}
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};
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unsigned asA = LocA.Ptr->getType()->getPointerAddressSpace();
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unsigned asB = LocB.Ptr->getType()->getPointerAddressSpace();
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if (asA > AMDGPUAS::AddressSpaces::FLAT_ADDRESS ||
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asB > AMDGPUAS::AddressSpaces::FLAT_ADDRESS)
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report_fatal_error("Pointer address space out of range");
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AliasResult Result = ASAliasRules[asA][asB];
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if (Result == NoAlias) return Result;
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if (isa<Argument>(LocA.Ptr) && isa<Argument>(LocB.Ptr)) {
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Type *T1 = cast<PointerType>(LocA.Ptr->getType())->getElementType();
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Type *T2 = cast<PointerType>(LocB.Ptr->getType())->getElementType();
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if ((T1->isVectorTy() && !T2->isVectorTy()) ||
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(T2->isVectorTy() && !T1->isVectorTy()))
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return NoAlias;
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}
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// Forward the query to the next alias analysis.
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return AAResultBase::alias(LocA, LocB);
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}
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bool AMDGPUAAResult::pointsToConstantMemory(const MemoryLocation &Loc,
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bool OrLocal) {
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const Value *Base = GetUnderlyingObject(Loc.Ptr, DL);
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if (Base->getType()->getPointerAddressSpace() ==
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AMDGPUAS::AddressSpaces::CONSTANT_ADDRESS) {
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return true;
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}
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if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(Base)) {
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if (GV->isConstant())
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return true;
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} else if (const Argument *Arg = dyn_cast<Argument>(Base)) {
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const Function *F = Arg->getParent();
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// Only assume constant memory for arguments on kernels.
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switch (F->getCallingConv()) {
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default:
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return AAResultBase::pointsToConstantMemory(Loc, OrLocal);
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case CallingConv::AMDGPU_VS:
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case CallingConv::AMDGPU_GS:
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case CallingConv::AMDGPU_PS:
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case CallingConv::AMDGPU_CS:
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case CallingConv::AMDGPU_KERNEL:
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case CallingConv::SPIR_KERNEL:
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break;
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}
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unsigned ArgNo = Arg->getArgNo();
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/* On an argument, ReadOnly attribute indicates that the function does
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not write through this pointer argument, even though it may write
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to the memory that the pointer points to.
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On an argument, ReadNone attribute indicates that the function does
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not dereference that pointer argument, even though it may read or write
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the memory that the pointer points to if accessed through other pointers.
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*/
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if (F->getAttributes().hasAttribute(ArgNo + 1, Attribute::NoAlias) &&
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(F->getAttributes().hasAttribute(ArgNo + 1, Attribute::ReadNone) ||
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F->getAttributes().hasAttribute(ArgNo + 1, Attribute::ReadOnly))) {
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return true;
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}
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}
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return AAResultBase::pointsToConstantMemory(Loc, OrLocal);
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}
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@ -0,0 +1,86 @@
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//===- AMDGPUAliasAnalysis ---------------------------------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This is the AMGPU address space based alias analysis pass.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_ANALYSIS_AMDGPUALIASANALYSIS_H
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#define LLVM_ANALYSIS_AMDGPUALIASANALYSIS_H
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Pass.h"
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namespace llvm {
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/// A simple AA result that uses TBAA metadata to answer queries.
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class AMDGPUAAResult : public AAResultBase<AMDGPUAAResult> {
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friend AAResultBase<AMDGPUAAResult>;
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const DataLayout &DL;
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public:
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explicit AMDGPUAAResult(const DataLayout &DL) : AAResultBase(), DL(DL) {}
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AMDGPUAAResult(AMDGPUAAResult &&Arg)
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: AAResultBase(std::move(Arg)), DL(Arg.DL){}
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/// Handle invalidation events from the new pass manager.
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///
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/// By definition, this result is stateless and so remains valid.
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bool invalidate(Function &, const PreservedAnalyses &) { return false; }
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AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB);
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bool pointsToConstantMemory(const MemoryLocation &Loc, bool OrLocal);
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private:
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bool Aliases(const MDNode *A, const MDNode *B) const;
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bool PathAliases(const MDNode *A, const MDNode *B) const;
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};
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/// Analysis pass providing a never-invalidated alias analysis result.
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class AMDGPUAA : public AnalysisInfoMixin<AMDGPUAA> {
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friend AnalysisInfoMixin<AMDGPUAA>;
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static char PassID;
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public:
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typedef AMDGPUAAResult Result;
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AMDGPUAAResult run(Function &F, AnalysisManager<Function> &AM) {
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return AMDGPUAAResult(F.getParent()->getDataLayout());
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}
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};
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/// Legacy wrapper pass to provide the AMDGPUAAResult object.
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class AMDGPUAAWrapperPass : public ImmutablePass {
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std::unique_ptr<AMDGPUAAResult> Result;
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public:
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static char ID;
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AMDGPUAAWrapperPass() : ImmutablePass(ID) {
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initializeAMDGPUAAWrapperPassPass(*PassRegistry::getPassRegistry());
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}
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AMDGPUAAResult &getResult() { return *Result; }
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const AMDGPUAAResult &getResult() const { return *Result; }
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bool doInitialization(Module &M) override {
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Result.reset(new AMDGPUAAResult(M.getDataLayout()));
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return false;
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}
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bool doFinalization(Module &M) override {
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Result.reset();
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return false;
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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};
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}
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#endif // LLVM_ANALYSIS_AMDGPUALIASANALYSIS_H
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@ -15,6 +15,7 @@
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#include "AMDGPUTargetMachine.h"
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#include "AMDGPU.h"
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#include "AMDGPUAliasAnalysis.h"
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#include "AMDGPUCallLowering.h"
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#include "AMDGPUInstructionSelector.h"
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#include "AMDGPULegalizerInfo.h"
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@ -93,6 +94,11 @@ static cl::opt<bool> InternalizeSymbols(
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cl::init(false),
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cl::Hidden);
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// Enable address space based alias analysis
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static cl::opt<bool> EnableAMDGPUAliasAnalysis("enable-amdgpu-aa", cl::Hidden,
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cl::desc("Enable AMDGPU Alias Analysis"),
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cl::init(true));
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extern "C" void LLVMInitializeAMDGPUTarget() {
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// Register the target
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RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
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@ -119,6 +125,7 @@ extern "C" void LLVMInitializeAMDGPUTarget() {
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initializeSIInsertSkipsPass(*PR);
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initializeSIDebuggerInsertNopsPass(*PR);
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initializeSIOptimizeExecMaskingPass(*PR);
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initializeAMDGPUAAWrapperPassPass(*PR);
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}
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static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
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@ -507,6 +514,15 @@ void AMDGPUPassConfig::addIRPasses() {
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addPass(createSROAPass());
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addStraightLineScalarOptimizationPasses();
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if (EnableAMDGPUAliasAnalysis) {
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addPass(createAMDGPUAAWrapperPass());
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addPass(createExternalAAWrapperPass([](Pass &P, Function &,
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AAResults &AAR) {
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if (auto *WrapperPass = P.getAnalysisIfAvailable<AMDGPUAAWrapperPass>())
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AAR.addAAResult(WrapperPass->getResult());
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}));
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}
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}
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TargetPassConfig::addIRPasses();
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@ -36,6 +36,7 @@ endif()
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add_llvm_target(AMDGPUCodeGen
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AMDILCFGStructurizer.cpp
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AMDGPUAliasAnalysis.cpp
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPUAnnotateUniformValues.cpp
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@ -1,9 +1,9 @@
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; RUN: llc -show-mc-encoding -mattr=+promote-alloca -amdgpu-load-store-vectorizer=0 -verify-machineinstrs -march=amdgcn < %s | FileCheck %s -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC
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; RUN: llc -show-mc-encoding -mattr=+promote-alloca -amdgpu-load-store-vectorizer=0 -verify-machineinstrs -mtriple=amdgcn--amdhsa -mcpu=kaveri -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC -check-prefix=HSA-PROMOTE
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; RUN: llc -show-mc-encoding -mattr=-promote-alloca -amdgpu-load-store-vectorizer=0 -verify-machineinstrs -march=amdgcn < %s | FileCheck %s -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC
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; RUN: llc -show-mc-encoding -mattr=-promote-alloca -amdgpu-load-store-vectorizer=0 -verify-machineinstrs -mtriple=amdgcn-amdhsa -mcpu=kaveri -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC -check-prefix=HSA-ALLOCA
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; RUN: llc -show-mc-encoding -mattr=+promote-alloca -amdgpu-load-store-vectorizer=0 -verify-machineinstrs -mtriple=amdgcn-amdhsa -march=amdgcn -mcpu=tonga -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC
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; RUN: llc -show-mc-encoding -mattr=-promote-alloca -amdgpu-load-store-vectorizer=0 -verify-machineinstrs -mtriple=amdgcn-amdhsa -march=amdgcn -mcpu=tonga -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC
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; RUN: llc -show-mc-encoding -mattr=+promote-alloca -amdgpu-load-store-vectorizer=0 -enable-amdgpu-aa=0 -verify-machineinstrs -march=amdgcn < %s | FileCheck %s -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC
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; RUN: llc -show-mc-encoding -mattr=+promote-alloca -amdgpu-load-store-vectorizer=0 -enable-amdgpu-aa=0 -verify-machineinstrs -mtriple=amdgcn--amdhsa -mcpu=kaveri -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC -check-prefix=HSA-PROMOTE
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; RUN: llc -show-mc-encoding -mattr=-promote-alloca -amdgpu-load-store-vectorizer=0 -enable-amdgpu-aa=0 -verify-machineinstrs -march=amdgcn < %s | FileCheck %s -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC
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; RUN: llc -show-mc-encoding -mattr=-promote-alloca -amdgpu-load-store-vectorizer=0 -enable-amdgpu-aa=0 -verify-machineinstrs -mtriple=amdgcn-amdhsa -mcpu=kaveri -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC -check-prefix=HSA-ALLOCA
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; RUN: llc -show-mc-encoding -mattr=+promote-alloca -amdgpu-load-store-vectorizer=0 -enable-amdgpu-aa=0 -verify-machineinstrs -mtriple=amdgcn-amdhsa -march=amdgcn -mcpu=tonga -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC
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; RUN: llc -show-mc-encoding -mattr=-promote-alloca -amdgpu-load-store-vectorizer=0 -enable-amdgpu-aa=0 -verify-machineinstrs -mtriple=amdgcn-amdhsa -march=amdgcn -mcpu=tonga -mattr=-unaligned-buffer-access < %s | FileCheck %s -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC
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; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck -check-prefix=HSAOPT -check-prefix=OPT %s
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; RUN: opt -S -mtriple=amdgcn-unknown-unknown -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck -check-prefix=NOHSAOPT -check-prefix=OPT %s
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@ -1,6 +1,6 @@
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=gfx901 -mattr=+flat-for-global,-fp64-fp16-denormals < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=GFX89 %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=fiji -mattr=+flat-for-global < %s | FileCheck -check-prefix=GCN -check-prefix=CIVI -check-prefix=VI -check-prefix=GFX89 %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=hawaii -mattr=+flat-for-global < %s | FileCheck -check-prefix=GCN -check-prefix=CIVI -check-prefix=CI %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=gfx901 -enable-amdgpu-aa=0 -mattr=+flat-for-global,-fp64-fp16-denormals < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=GFX89 %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=fiji -enable-amdgpu-aa=0 -mattr=+flat-for-global < %s | FileCheck -check-prefix=GCN -check-prefix=CIVI -check-prefix=VI -check-prefix=GFX89 %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=hawaii -enable-amdgpu-aa=0 -mattr=+flat-for-global < %s | FileCheck -check-prefix=GCN -check-prefix=CIVI -check-prefix=CI %s
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; GCN-LABEL: {{^}}s_insertelement_v2i16_0:
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; GCN: s_load_dword [[VEC:s[0-9]+]]
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@ -1,4 +1,4 @@
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -enable-misched -enable-aa-sched-mi < %s | FileCheck -check-prefix=FUNC -check-prefix=CI %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -enable-amdgpu-aa=0 -verify-machineinstrs -enable-misched -enable-aa-sched-mi < %s | FileCheck -check-prefix=FUNC -check-prefix=CI %s
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declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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@ -1,4 +1,4 @@
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; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs -mattr=-promote-alloca,-load-store-opt < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=hawaii -enable-amdgpu-aa=0 -verify-machineinstrs -mattr=-promote-alloca,-load-store-opt < %s | FileCheck -check-prefix=GCN %s
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@sPrivateStorage = internal addrspace(3) global [256 x [8 x <4 x i64>]] undef
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@ -0,0 +1,80 @@
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
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; CHECK-DAG: flat_load_dwordx4
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; CHECK-DAG: flat_load_dwordx4
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; CHECK-DAG: flat_load_dwordx4
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; CHECK-DAG: flat_load_dwordx4
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; CHECK-DAG: ds_write2_b32
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; CHECK-DAG: ds_write2_b32
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; CHECK-DAG: ds_write2_b32
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; CHECK-DAG: ds_write2_b32
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; CHECK-DAG: ds_write2_b32
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; CHECK-DAG: ds_write2_b32
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; CHECK-DAG: ds_write2_b32
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; CHECK-DAG: ds_write2_b32
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define void @vectorize_global_local(i32 addrspace(1)* nocapture readonly %arg, i32 addrspace(3)* nocapture %arg1) {
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bb:
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%tmp = load i32, i32 addrspace(1)* %arg, align 4
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store i32 %tmp, i32 addrspace(3)* %arg1, align 4
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%tmp2 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 1
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%tmp3 = load i32, i32 addrspace(1)* %tmp2, align 4
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%tmp4 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 1
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store i32 %tmp3, i32 addrspace(3)* %tmp4, align 4
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||||
%tmp5 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 2
|
||||
%tmp6 = load i32, i32 addrspace(1)* %tmp5, align 4
|
||||
%tmp7 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 2
|
||||
store i32 %tmp6, i32 addrspace(3)* %tmp7, align 4
|
||||
%tmp8 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 3
|
||||
%tmp9 = load i32, i32 addrspace(1)* %tmp8, align 4
|
||||
%tmp10 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 3
|
||||
store i32 %tmp9, i32 addrspace(3)* %tmp10, align 4
|
||||
%tmp11 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 4
|
||||
%tmp12 = load i32, i32 addrspace(1)* %tmp11, align 4
|
||||
%tmp13 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 4
|
||||
store i32 %tmp12, i32 addrspace(3)* %tmp13, align 4
|
||||
%tmp14 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 5
|
||||
%tmp15 = load i32, i32 addrspace(1)* %tmp14, align 4
|
||||
%tmp16 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 5
|
||||
store i32 %tmp15, i32 addrspace(3)* %tmp16, align 4
|
||||
%tmp17 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 6
|
||||
%tmp18 = load i32, i32 addrspace(1)* %tmp17, align 4
|
||||
%tmp19 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 6
|
||||
store i32 %tmp18, i32 addrspace(3)* %tmp19, align 4
|
||||
%tmp20 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 7
|
||||
%tmp21 = load i32, i32 addrspace(1)* %tmp20, align 4
|
||||
%tmp22 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 7
|
||||
store i32 %tmp21, i32 addrspace(3)* %tmp22, align 4
|
||||
%tmp23 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 8
|
||||
%tmp24 = load i32, i32 addrspace(1)* %tmp23, align 4
|
||||
%tmp25 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 8
|
||||
store i32 %tmp24, i32 addrspace(3)* %tmp25, align 4
|
||||
%tmp26 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 9
|
||||
%tmp27 = load i32, i32 addrspace(1)* %tmp26, align 4
|
||||
%tmp28 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 9
|
||||
store i32 %tmp27, i32 addrspace(3)* %tmp28, align 4
|
||||
%tmp29 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 10
|
||||
%tmp30 = load i32, i32 addrspace(1)* %tmp29, align 4
|
||||
%tmp31 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 10
|
||||
store i32 %tmp30, i32 addrspace(3)* %tmp31, align 4
|
||||
%tmp32 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 11
|
||||
%tmp33 = load i32, i32 addrspace(1)* %tmp32, align 4
|
||||
%tmp34 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 11
|
||||
store i32 %tmp33, i32 addrspace(3)* %tmp34, align 4
|
||||
%tmp35 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 12
|
||||
%tmp36 = load i32, i32 addrspace(1)* %tmp35, align 4
|
||||
%tmp37 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 12
|
||||
store i32 %tmp36, i32 addrspace(3)* %tmp37, align 4
|
||||
%tmp38 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 13
|
||||
%tmp39 = load i32, i32 addrspace(1)* %tmp38, align 4
|
||||
%tmp40 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 13
|
||||
store i32 %tmp39, i32 addrspace(3)* %tmp40, align 4
|
||||
%tmp41 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 14
|
||||
%tmp42 = load i32, i32 addrspace(1)* %tmp41, align 4
|
||||
%tmp43 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 14
|
||||
store i32 %tmp42, i32 addrspace(3)* %tmp43, align 4
|
||||
%tmp44 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 15
|
||||
%tmp45 = load i32, i32 addrspace(1)* %tmp44, align 4
|
||||
%tmp46 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 15
|
||||
store i32 %tmp45, i32 addrspace(3)* %tmp46, align 4
|
||||
ret void
|
||||
}
|
||||
Loading…
Reference in New Issue