[x86] avoid crashing when splitting AVX stores with non-simple type (PR43916)

The store splitting transform was assuming a simple type (MVT),
but that's not necessarily the case as shown in the test.
This commit is contained in:
Sanjay Patel 2019-11-06 09:06:48 -05:00
parent 3e54404c71
commit 8e34dd941c
2 changed files with 28 additions and 3 deletions

View File

@ -21776,12 +21776,14 @@ static SDValue splitVectorStore(StoreSDNode *Store, SelectionDAG &DAG) {
"Expecting 256/512-bit op");
// Splitting volatile memory ops is not allowed unless the operation was not
// legal to begin with. We are assuming the input op is legal (this transform
// is only used for targets with AVX).
// legal to begin with. Assume the input store is legal (this transform is
// only used for targets with AVX). Note: It is possible that we have an
// illegal type like v2i128, and so we could allow splitting a volatile store
// in that case if that is important.
if (!Store->isSimple())
return SDValue();
MVT StoreVT = StoredVal.getSimpleValueType();
EVT StoreVT = StoredVal.getValueType();
unsigned NumElems = StoreVT.getVectorNumElements();
unsigned HalfSize = StoredVal.getValueSizeInBits() / 2;
unsigned HalfAlign = (128 == HalfSize ? 16 : 32);

View File

@ -333,3 +333,26 @@ define void @add4i64a16(<4 x i64>* %ret, <4 x i64>* %bp) nounwind {
ret void
}
; This used to crash.
; v2i128 may not be a "simple" (MVT) type, but we can split that.
; This example gets split further in legalization.
define void @PR43916(<2 x i128> %y, <2 x i128>* %z) {
; CHECK-LABEL: PR43916:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rcx, 24(%r8)
; CHECK-NEXT: movq %rdx, 16(%r8)
; CHECK-NEXT: movq %rsi, 8(%r8)
; CHECK-NEXT: movq %rdi, (%r8)
; CHECK-NEXT: retq
;
; CHECK_O0-LABEL: PR43916:
; CHECK_O0: # %bb.0:
; CHECK_O0-NEXT: movq %rdi, (%r8)
; CHECK_O0-NEXT: movq %rsi, 8(%r8)
; CHECK_O0-NEXT: movq %rdx, 16(%r8)
; CHECK_O0-NEXT: movq %rcx, 24(%r8)
; CHECK_O0-NEXT: retq
store <2 x i128> %y, <2 x i128>* %z, align 16
ret void
}