forked from OSchip/llvm-project
Revert "Re-enable byval for ARM in clang. rdar://problem/7662569"
This reverts commit 67d097e1232b7d66f58989c16a45b8a11721f76e. We found a miscompile with ARM byval, which is still being investigated. In the meantime, this works around the problem by disabling ARM byval. Conflicts: lib/CodeGen/TargetInfo.cpp llvm-svn: 136662
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@ -2400,21 +2400,17 @@ ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const {
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// Otherwise, pass by coercing to a structure of the appropriate size.
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//
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// FIXME: This is kind of nasty... but there isn't much choice because the ARM
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// backend doesn't support byval.
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// FIXME: This doesn't handle alignment > 64 bits.
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llvm::Type* ElemTy;
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unsigned SizeRegs;
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if (getContext().getTypeSizeInChars(Ty) <= CharUnits::fromQuantity(64)) {
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ElemTy = llvm::Type::getInt32Ty(getVMContext());
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SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
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} else if (getABIKind() == ARMABIInfo::APCS) {
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// Initial ARM ByVal support is APCS-only.
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return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
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} else {
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// FIXME: This is kind of nasty... but there isn't much choice
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// because most of the ARM calling conventions don't yet support
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// byval.
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if (getContext().getTypeAlign(Ty) > 32) {
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ElemTy = llvm::Type::getInt64Ty(getVMContext());
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SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
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} else {
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ElemTy = llvm::Type::getInt32Ty(getVMContext());
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SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
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}
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llvm::Type *STy =
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