forked from OSchip/llvm-project
[AMDGPU] Fix missing waitcnt issue
Ignore out of order counters when merging brackets. The fact that there was a pending event in the old state does not guarantee that the waitcnt was generated, so we still need to conservatively re-process the block. The patch fixes a correctness issue where the block was not re-processed and the waitcnt not inserted in consequence. Differential Revision: https://reviews.llvm.org/D117544
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@ -1382,7 +1382,6 @@ bool WaitcntBrackets::merge(const WaitcntBrackets &Other) {
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for (auto T : inst_counter_types()) {
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// Merge event flags for this counter
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const bool OldOutOfOrder = counterOutOfOrder(T);
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const unsigned OldEvents = PendingEvents & WaitEventMaskForInst[T];
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const unsigned OtherEvents = Other.PendingEvents & WaitEventMaskForInst[T];
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if (OtherEvents & ~OldEvents)
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@ -1425,7 +1424,7 @@ bool WaitcntBrackets::merge(const WaitcntBrackets &Other) {
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}
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}
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if (RegStrictDom && !OldOutOfOrder)
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if (RegStrictDom)
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StrictDom = true;
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}
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@ -44,6 +44,10 @@
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define amdgpu_kernel void @subregs16bit() {
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ret void
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}
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define amdgpu_kernel void @waitcnt_backedge() {
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ret void
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}
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...
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---
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@ -332,3 +336,35 @@ body: |
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$vgpr1 = FLAT_LOAD_USHORT killed $vgpr2_vgpr3, 0, 0, implicit $exec, implicit $flat_scr
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V_NOP_e32 implicit $exec, implicit $vgpr0_lo16, implicit $vgpr1_lo16
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...
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---
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# Waitcnt required before the use of $sgpr10_sgpr11, as the S_LOAD also writes
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# to $sgpr10_sgpr11, and can occur first in the program running order.
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# CHECK-LABEL: name: waitcnt_backedge
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# CHECK: S_WAITCNT
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# CHECK: $sgpr10_sgpr11 = S_CSELECT_B64
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# CHECK: $sgpr10_sgpr11 = S_LOAD_DWORDX2_IMM
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name: waitcnt_backedge
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body: |
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bb.0:
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renamable $sgpr4_sgpr5_sgpr6_sgpr7 = S_LOAD_DWORDX4_IMM renamable $sgpr2_sgpr3, 32, 0 :: (load (s128) from `i32 addrspace(4)* undef`, addrspace 4)
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bb.4:
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renamable $sgpr10_sgpr11 = S_CSELECT_B64 -1, 0, implicit killed $scc
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renamable $vgpr1 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr5, renamable $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 1, 0, 0, implicit $exec :: (dereferenceable load (s32), align 1, addrspace 4)
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renamable $sgpr10_sgpr11 = S_LOAD_DWORDX2_IMM killed renamable $sgpr0_sgpr1, 0, 0 :: (load (s64) from `i32 addrspace(4)* undef`, align 4, addrspace 4)
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S_CBRANCH_SCC0 %bb.9, implicit killed $scc
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bb.9:
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renamable $vgpr1 = V_CNDMASK_B32_e64 0, 0, 0, 1, killed $sgpr14_sgpr15, implicit $exec
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S_CBRANCH_SCC0 %bb.14, implicit killed $scc
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bb.10:
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S_BRANCH %bb.4
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bb.14:
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S_ENDPGM 0
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...
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