forked from OSchip/llvm-project
parent
a3f52aaa19
commit
8dae41a1cb
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@ -1419,7 +1419,7 @@ getPwAff(Scop &S, BasicBlock *BB,
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bool NonNegative = false) {
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PWACtx PWAC = S.getPwAff(E, BB, NonNegative);
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InvalidDomainMap[BB] = InvalidDomainMap[BB].unite(PWAC.second);
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return PWAC.first.take();
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return PWAC.first.release();
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}
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/// Build the conditions sets for the switch @p SI in the @p Domain.
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@ -2730,8 +2730,8 @@ public:
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PPCGScop->tagged_must_writes = getTaggedMustWrites();
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PPCGScop->must_writes = S->getMustWrites().release();
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PPCGScop->live_out = nullptr;
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PPCGScop->tagged_must_kills = KillsInfo.TaggedMustKills.take();
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PPCGScop->must_kills = KillsInfo.MustKills.take();
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PPCGScop->tagged_must_kills = KillsInfo.TaggedMustKills.release();
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PPCGScop->must_kills = KillsInfo.MustKills.release();
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PPCGScop->tagger = nullptr;
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PPCGScop->independence =
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@ -2747,7 +2747,7 @@ public:
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// If we have something non-trivial to kill, add it to the schedule
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if (KillsInfo.KillsSchedule.get())
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PPCGScop->schedule = isl_schedule_sequence(
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PPCGScop->schedule, KillsInfo.KillsSchedule.take());
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PPCGScop->schedule, KillsInfo.KillsSchedule.release());
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PPCGScop->names = getNames();
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PPCGScop->pet = nullptr;
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@ -69,7 +69,7 @@ static SCEV::NoWrapFlags getNoWrapFlags(const SCEV *Expr) {
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static PWACtx combine(PWACtx PWAC0, PWACtx PWAC1,
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__isl_give isl_pw_aff *(Fn)(__isl_take isl_pw_aff *,
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__isl_take isl_pw_aff *)) {
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PWAC0.first = isl::manage(Fn(PWAC0.first.take(), PWAC1.first.take()));
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PWAC0.first = isl::manage(Fn(PWAC0.first.release(), PWAC1.first.release()));
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PWAC0.second = PWAC0.second.unite(PWAC1.second);
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return PWAC0;
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}
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@ -94,14 +94,14 @@ void SCEVAffinator::interpretAsUnsigned(PWACtx &PWAC, unsigned Width) {
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isl_pw_aff_intersect_domain(PWAC.first.copy(), isl_set_copy(NonNegDom));
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auto *ExpPWA = getWidthExpValOnDomain(Width, isl_set_complement(NonNegDom));
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PWAC.first = isl::manage(isl_pw_aff_union_add(
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NonNegPWA, isl_pw_aff_add(PWAC.first.take(), ExpPWA)));
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NonNegPWA, isl_pw_aff_add(PWAC.first.release(), ExpPWA)));
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}
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void SCEVAffinator::takeNonNegativeAssumption(PWACtx &PWAC) {
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auto *NegPWA = isl_pw_aff_neg(PWAC.first.copy());
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auto *NegDom = isl_pw_aff_pos_set(NegPWA);
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PWAC.second =
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isl::manage(isl_set_union(PWAC.second.take(), isl_set_copy(NegDom)));
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isl::manage(isl_set_union(PWAC.second.release(), isl_set_copy(NegDom)));
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auto *Restriction = BB ? NegDom : isl_set_params(NegDom);
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auto DL = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
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S->recordAssumption(UNSIGNED, isl::manage(Restriction), DL, AS_RESTRICTION,
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@ -161,7 +161,7 @@ isl::pw_aff SCEVAffinator::addModuloSemantic(isl::pw_aff PWA,
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isl::set Domain = PWA.domain();
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isl::pw_aff AddPW =
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isl::manage(getWidthExpValOnDomain(Width - 1, Domain.take()));
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isl::manage(getWidthExpValOnDomain(Width - 1, Domain.release()));
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return PWA.add(AddPW).mod(ModVal).sub(AddPW);
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}
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@ -276,7 +276,7 @@ PWACtx SCEVAffinator::visitTruncateExpr(const SCEVTruncateExpr *Expr) {
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if (computeModuloForExpr(Expr))
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return OpPWAC;
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auto *Dom = OpPWAC.first.domain().take();
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auto *Dom = OpPWAC.first.domain().release();
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auto *ExpPWA = getWidthExpValOnDomain(Width - 1, Dom);
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auto *GreaterDom =
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isl_pw_aff_ge_set(OpPWAC.first.copy(), isl_pw_aff_copy(ExpPWA));
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@ -462,7 +462,7 @@ PWACtx SCEVAffinator::visitUDivExpr(const SCEVUDivExpr *Expr) {
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// piece-wise defined value described for zero-extends as we already know
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// the actual value of the constant divisor.
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unsigned Width = TD.getTypeSizeInBits(Expr->getType());
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auto *DivisorDom = DivisorPWAC.first.domain().take();
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auto *DivisorDom = DivisorPWAC.first.domain().release();
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auto *WidthExpPWA = getWidthExpValOnDomain(Width, DivisorDom);
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DivisorPWAC.first = DivisorPWAC.first.add(isl::manage(WidthExpPWA));
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}
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