forked from OSchip/llvm-project
[AMDGPU][NFC] Generate llvm.amdgcn.set.inactive tests
This is a pre-commit for D95509.
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; RUN: llc -global-isel -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %S/../llvm.amdgcn.set.inactive.ll | FileCheck -check-prefix=GCN %S/../llvm.amdgcn.set.inactive.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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define amdgpu_kernel void @set_inactive(i32 addrspace(1)* %out, i32 %in) {
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; GCN-LABEL: set_inactive:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
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; GCN-NEXT: s_load_dword s0, s[0:1], 0x2c
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; GCN-NEXT: s_mov_b32 s6, -1
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s0
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: v_mov_b32_e32 v0, 42
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: s_mov_b32 s7, 0xf000
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; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
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; GCN-NEXT: s_endpgm
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%tmp = call i32 @llvm.amdgcn.set.inactive.i32(i32 %in, i32 42) #0
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store i32 %tmp, i32 addrspace(1)* %out
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ret void
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}
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define amdgpu_kernel void @set_inactive_64(i64 addrspace(1)* %out, i64 %in) {
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; GCN-LABEL: set_inactive_64:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s2
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; GCN-NEXT: v_mov_b32_e32 v1, s3
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: v_mov_b32_e32 v1, 0
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: v_mov_b32_e32 v3, s1
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; GCN-NEXT: v_mov_b32_e32 v2, s0
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; GCN-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
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; GCN-NEXT: s_endpgm
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%tmp = call i64 @llvm.amdgcn.set.inactive.i64(i64 %in, i64 0) #0
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store i64 %tmp, i64 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.amdgcn.set.inactive.i32(i32, i32) #0
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declare i64 @llvm.amdgcn.set.inactive.i64(i64, i64) #0
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attributes #0 = { convergent readnone }
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@ -1,23 +1,42 @@
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}set_inactive:
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; GCN: s_not_b64 exec, exec
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; GCN: v_mov_b32_e32 {{v[0-9]+}}, 42
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; GCN: s_not_b64 exec, exec
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define amdgpu_kernel void @set_inactive(i32 addrspace(1)* %out, i32 %in) {
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; GCN-LABEL: set_inactive:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
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; GCN-NEXT: s_load_dword s0, s[0:1], 0x2c
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; GCN-NEXT: s_mov_b32 s7, 0xf000
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; GCN-NEXT: s_mov_b32 s6, -1
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s0
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: v_mov_b32_e32 v0, 42
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
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; GCN-NEXT: s_endpgm
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%tmp = call i32 @llvm.amdgcn.set.inactive.i32(i32 %in, i32 42) #0
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store i32 %tmp, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}set_inactive_64:
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; GCN: s_not_b64 exec, exec
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; GCN: v_mov_b32_e32 {{v[0-9]+}}, 0
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; GCN: v_mov_b32_e32 {{v[0-9]+}}, 0
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; GCN: s_not_b64 exec, exec
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define amdgpu_kernel void @set_inactive_64(i64 addrspace(1)* %out, i64 %in) {
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; GCN-LABEL: set_inactive_64:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
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; GCN-NEXT: s_mov_b32 s3, 0xf000
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; GCN-NEXT: s_mov_b32 s2, -1
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: s_mov_b32 s0, s4
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; GCN-NEXT: s_mov_b32 s1, s5
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; GCN-NEXT: v_mov_b32_e32 v0, s6
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; GCN-NEXT: v_mov_b32_e32 v1, s7
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: v_mov_b32_e32 v1, 0
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; GCN-NEXT: s_not_b64 exec, exec
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; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
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; GCN-NEXT: s_endpgm
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%tmp = call i64 @llvm.amdgcn.set.inactive.i64(i64 %in, i64 0) #0
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store i64 %tmp, i64 addrspace(1)* %out
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ret void
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