forked from OSchip/llvm-project
parent
3184f22447
commit
8d806876c0
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@ -46,22 +46,13 @@ STATISTIC(NumEmitted, "Number of machine instructions emitted");
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namespace {
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class ARMCodeEmitter {
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public:
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/// getBinaryCodeForInstr - This function, generated by the
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/// CodeEmitterGenerator using TableGen, produces the binary encoding for
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/// machine instructions.
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unsigned getBinaryCodeForInstr(const MachineInstr &MI);
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};
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template<class CodeEmitter>
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class Emitter : public MachineFunctionPass, public ARMCodeEmitter {
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class ARMCodeEmitter : public MachineFunctionPass {
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ARMJITInfo *JTI;
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const ARMInstrInfo *II;
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const TargetData *TD;
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const ARMSubtarget *Subtarget;
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TargetMachine &TM;
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CodeEmitter &MCE;
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JITCodeEmitter &MCE;
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const std::vector<MachineConstantPoolEntry> *MCPEs;
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const std::vector<MachineJumpTableEntry> *MJTEs;
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bool IsPIC;
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@ -71,18 +62,19 @@ namespace {
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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public:
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static char ID;
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explicit Emitter(TargetMachine &tm, CodeEmitter &mce)
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: MachineFunctionPass(&ID), JTI(0), II(0), TD(0), TM(tm),
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MCE(mce), MCPEs(0), MJTEs(0),
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IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
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Emitter(TargetMachine &tm, CodeEmitter &mce,
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const ARMInstrInfo &ii, const TargetData &td)
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: MachineFunctionPass(&ID), JTI(0), II(&ii), TD(&td), TM(tm),
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public:
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ARMCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
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: MachineFunctionPass(&ID), JTI(0), II((ARMInstrInfo*)tm.getInstrInfo()),
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TD(tm.getTargetData()), TM(tm),
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MCE(mce), MCPEs(0), MJTEs(0),
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IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
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/// getBinaryCodeForInstr - This function, generated by the
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/// CodeEmitterGenerator using TableGen, produces the binary encoding for
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/// machine instructions.
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unsigned getBinaryCodeForInstr(const MachineInstr &MI);
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bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const {
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@ -94,21 +86,13 @@ namespace {
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private:
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void emitWordLE(unsigned Binary);
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void emitDWordLE(uint64_t Binary);
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void emitConstPoolInstruction(const MachineInstr &MI);
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void emitMOVi2piecesInstruction(const MachineInstr &MI);
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void emitLEApcrelJTInstruction(const MachineInstr &MI);
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void emitPseudoMoveInstruction(const MachineInstr &MI);
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void addPCLabel(unsigned LabelID);
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void emitPseudoInstruction(const MachineInstr &MI);
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unsigned getMachineSoRegOpValue(const MachineInstr &MI,
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const TargetInstrDesc &TID,
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const MachineOperand &MO,
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@ -176,19 +160,18 @@ namespace {
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void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc,
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intptr_t JTBase = 0);
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};
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template <class CodeEmitter>
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char Emitter<CodeEmitter>::ID = 0;
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}
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char ARMCodeEmitter::ID = 0;
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/// createARMJITCodeEmitterPass - Return a pass that emits the collected ARM
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/// code to the specified MCE object.
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FunctionPass *llvm::createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
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JITCodeEmitter &JCE) {
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return new Emitter<JITCodeEmitter>(TM, JCE);
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return new ARMCodeEmitter(TM, JCE);
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}
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template<class CodeEmitter>
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bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
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bool ARMCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
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assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
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MF.getTarget().getRelocationModel() != Reloc::Static) &&
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"JIT relocation model must be set to static or default!");
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@ -221,8 +204,7 @@ bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
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/// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
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///
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template<class CodeEmitter>
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unsigned Emitter<CodeEmitter>::getShiftOp(unsigned Imm) const {
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unsigned ARMCodeEmitter::getShiftOp(unsigned Imm) const {
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switch (ARM_AM::getAM2ShiftOpc(Imm)) {
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default: llvm_unreachable("Unknown shift opc!");
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case ARM_AM::asr: return 2;
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@ -236,8 +218,7 @@ unsigned Emitter<CodeEmitter>::getShiftOp(unsigned Imm) const {
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/// getMachineOpValue - Return binary encoding of operand. If the machine
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/// operand requires relocation, record the relocation and return zero.
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template<class CodeEmitter>
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unsigned Emitter<CodeEmitter>::getMachineOpValue(const MachineInstr &MI,
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unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI,
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const MachineOperand &MO) {
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if (MO.isReg())
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return ARMRegisterInfo::getRegisterNumbering(MO.getReg());
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@ -268,8 +249,7 @@ unsigned Emitter<CodeEmitter>::getMachineOpValue(const MachineInstr &MI,
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/// emitGlobalAddress - Emit the specified address to the code stream.
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///
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
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void ARMCodeEmitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
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bool MayNeedFarStub, bool Indirect,
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intptr_t ACPV) {
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MachineRelocation MR = Indirect
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@ -283,9 +263,7 @@ void Emitter<CodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
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/// emitExternalSymbolAddress - Arrange for the address of an external symbol to
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/// be emitted to the current location in the function, and allow it to be PC
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/// relative.
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitExternalSymbolAddress(const char *ES,
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unsigned Reloc) {
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void ARMCodeEmitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
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MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
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Reloc, ES));
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}
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@ -293,9 +271,7 @@ void Emitter<CodeEmitter>::emitExternalSymbolAddress(const char *ES,
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/// emitConstPoolAddress - Arrange for the address of an constant pool
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/// to be emitted to the current location in the function, and allow it to be PC
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/// relative.
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitConstPoolAddress(unsigned CPI,
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unsigned Reloc) {
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void ARMCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) {
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// Tell JIT emitter we'll resolve the address.
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MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
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Reloc, CPI, 0, true));
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@ -304,37 +280,31 @@ void Emitter<CodeEmitter>::emitConstPoolAddress(unsigned CPI,
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/// emitJumpTableAddress - Arrange for the address of a jump table to
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/// be emitted to the current location in the function, and allow it to be PC
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/// relative.
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitJumpTableAddress(unsigned JTIndex,
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unsigned Reloc) {
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void ARMCodeEmitter::emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) {
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MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
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Reloc, JTIndex, 0, true));
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}
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/// emitMachineBasicBlock - Emit the specified address basic block.
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitMachineBasicBlock(MachineBasicBlock *BB,
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void ARMCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
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unsigned Reloc, intptr_t JTBase) {
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MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
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Reloc, BB, JTBase));
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitWordLE(unsigned Binary) {
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void ARMCodeEmitter::emitWordLE(unsigned Binary) {
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DEBUG(errs() << " 0x";
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errs().write_hex(Binary) << "\n");
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MCE.emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitDWordLE(uint64_t Binary) {
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void ARMCodeEmitter::emitDWordLE(uint64_t Binary) {
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DEBUG(errs() << " 0x";
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errs().write_hex(Binary) << "\n");
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MCE.emitDWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
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DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI);
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MCE.processDebugLoc(MI.getDebugLoc(), true);
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@ -403,8 +373,7 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI) {
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MCE.processDebugLoc(MI.getDebugLoc(), false);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitConstPoolInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) {
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unsigned CPI = MI.getOperand(0).getImm(); // CP instruction index.
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unsigned CPIndex = MI.getOperand(1).getIndex(); // Actual cp entry index.
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const MachineConstantPoolEntry &MCPE = (*MCPEs)[CPIndex];
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@ -466,8 +435,7 @@ void Emitter<CodeEmitter>::emitConstPoolInstruction(const MachineInstr &MI) {
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}
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitMOVi2piecesInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitMOVi2piecesInstruction(const MachineInstr &MI) {
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const MachineOperand &MO0 = MI.getOperand(0);
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const MachineOperand &MO1 = MI.getOperand(1);
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assert(MO1.isImm() && ARM_AM::getSOImmVal(MO1.isImm()) != -1 &&
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@ -509,8 +477,7 @@ void Emitter<CodeEmitter>::emitMOVi2piecesInstruction(const MachineInstr &MI) {
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitLEApcrelJTInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitLEApcrelJTInstruction(const MachineInstr &MI) {
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// It's basically add r, pc, (LJTI - $+8)
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const TargetInstrDesc &TID = MI.getDesc();
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitPseudoMoveInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitPseudoMoveInstruction(const MachineInstr &MI) {
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unsigned Opcode = MI.getDesc().Opcode;
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// Part of binary is determined by TableGn.
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@ -577,15 +543,13 @@ void Emitter<CodeEmitter>::emitPseudoMoveInstruction(const MachineInstr &MI) {
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::addPCLabel(unsigned LabelID) {
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void ARMCodeEmitter::addPCLabel(unsigned LabelID) {
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DEBUG(errs() << " ** LPC" << LabelID << " @ "
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<< (void*)MCE.getCurrentPCValue() << '\n');
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JTI->addPCLabelAddr(LabelID, MCE.getCurrentPCValue());
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
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unsigned Opcode = MI.getDesc().Opcode;
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switch (Opcode) {
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default:
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@ -653,8 +617,7 @@ void Emitter<CodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
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}
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}
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template<class CodeEmitter>
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unsigned Emitter<CodeEmitter>::getMachineSoRegOpValue(
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unsigned ARMCodeEmitter::getMachineSoRegOpValue(
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const MachineInstr &MI,
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const TargetInstrDesc &TID,
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const MachineOperand &MO,
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@ -713,8 +676,7 @@ unsigned Emitter<CodeEmitter>::getMachineSoRegOpValue(
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return Binary | ARM_AM::getSORegOffset(MO2.getImm()) << 7;
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}
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template<class CodeEmitter>
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unsigned Emitter<CodeEmitter>::getMachineSoImmOpValue(unsigned SoImm) {
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unsigned ARMCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) {
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int SoImmVal = ARM_AM::getSOImmVal(SoImm);
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assert(SoImmVal != -1 && "Not a valid so_imm value!");
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@ -727,8 +689,7 @@ unsigned Emitter<CodeEmitter>::getMachineSoImmOpValue(unsigned SoImm) {
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return Binary;
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}
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template<class CodeEmitter>
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unsigned Emitter<CodeEmitter>::getAddrModeSBit(const MachineInstr &MI,
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unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI,
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const TargetInstrDesc &TID) const {
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for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i != e; --i){
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const MachineOperand &MO = MI.getOperand(i-1);
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@ -738,8 +699,7 @@ unsigned Emitter<CodeEmitter>::getAddrModeSBit(const MachineInstr &MI,
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return 0;
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitDataProcessingInstruction(
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void ARMCodeEmitter::emitDataProcessingInstruction(
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const MachineInstr &MI,
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unsigned ImplicitRd,
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unsigned ImplicitRn) {
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitLoadStoreInstruction(
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void ARMCodeEmitter::emitLoadStoreInstruction(
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const MachineInstr &MI,
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unsigned ImplicitRd,
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unsigned ImplicitRn) {
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitMiscLoadStoreInstruction(const MachineInstr &MI,
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void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
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unsigned ImplicitRn) {
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const TargetInstrDesc &TID = MI.getDesc();
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unsigned Form = TID.TSFlags & ARMII::FormMask;
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@ -969,8 +927,7 @@ static unsigned getAddrModeUPBits(unsigned Mode) {
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return Binary;
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitLoadStoreMultipleInstruction(
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void ARMCodeEmitter::emitLoadStoreMultipleInstruction(
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const MachineInstr &MI) {
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// Part of binary is determined by TableGn.
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unsigned Binary = getBinaryCodeForInstr(MI);
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitMulFrmInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitMulFrmInstruction(const MachineInstr &MI) {
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const TargetInstrDesc &TID = MI.getDesc();
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// Part of binary is determined by TableGn.
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitExtendInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitExtendInstruction(const MachineInstr &MI) {
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const TargetInstrDesc &TID = MI.getDesc();
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// Part of binary is determined by TableGn.
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitMiscArithInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitMiscArithInstruction(const MachineInstr &MI) {
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const TargetInstrDesc &TID = MI.getDesc();
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// Part of binary is determined by TableGn.
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitBranchInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
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const TargetInstrDesc &TID = MI.getDesc();
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if (TID.Opcode == ARM::TPsoft) {
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitInlineJumpTable(unsigned JTIndex) {
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void ARMCodeEmitter::emitInlineJumpTable(unsigned JTIndex) {
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// Remember the base address of the inline jump table.
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uintptr_t JTBase = MCE.getCurrentPCValue();
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JTI->addJumpTableBaseAddr(JTIndex, JTBase);
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@ -1159,8 +1111,7 @@ void Emitter<CodeEmitter>::emitInlineJumpTable(unsigned JTIndex) {
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}
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitMiscBranchInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
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const TargetInstrDesc &TID = MI.getDesc();
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// Handle jump tables.
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@ -1241,8 +1192,7 @@ static unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) {
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return Binary;
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitVFPArithInstruction(const MachineInstr &MI) {
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void ARMCodeEmitter::emitVFPArithInstruction(const MachineInstr &MI) {
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const TargetInstrDesc &TID = MI.getDesc();
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// Part of binary is determined by TableGn.
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@ -1281,8 +1231,7 @@ void Emitter<CodeEmitter>::emitVFPArithInstruction(const MachineInstr &MI) {
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitVFPConversionInstruction(
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void ARMCodeEmitter::emitVFPConversionInstruction(
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const MachineInstr &MI) {
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const TargetInstrDesc &TID = MI.getDesc();
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unsigned Form = TID.TSFlags & ARMII::FormMask;
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@ -1339,8 +1288,7 @@ void Emitter<CodeEmitter>::emitVFPConversionInstruction(
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emitWordLE(Binary);
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}
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
|
||||
void ARMCodeEmitter::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
|
||||
// Part of binary is determined by TableGn.
|
||||
unsigned Binary = getBinaryCodeForInstr(MI);
|
||||
|
||||
|
@ -1374,8 +1322,7 @@ void Emitter<CodeEmitter>::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
|
|||
emitWordLE(Binary);
|
||||
}
|
||||
|
||||
template<class CodeEmitter>
|
||||
void Emitter<CodeEmitter>::emitVFPLoadStoreMultipleInstruction(
|
||||
void ARMCodeEmitter::emitVFPLoadStoreMultipleInstruction(
|
||||
const MachineInstr &MI) {
|
||||
// Part of binary is determined by TableGn.
|
||||
unsigned Binary = getBinaryCodeForInstr(MI);
|
||||
|
@ -1410,8 +1357,7 @@ void Emitter<CodeEmitter>::emitVFPLoadStoreMultipleInstruction(
|
|||
emitWordLE(Binary);
|
||||
}
|
||||
|
||||
template<class CodeEmitter>
|
||||
void Emitter<CodeEmitter>::emitMiscInstruction(const MachineInstr &MI) {
|
||||
void ARMCodeEmitter::emitMiscInstruction(const MachineInstr &MI) {
|
||||
// Part of binary is determined by TableGn.
|
||||
unsigned Binary = getBinaryCodeForInstr(MI);
|
||||
|
||||
|
|
Loading…
Reference in New Issue