forked from OSchip/llvm-project
[Utils] reduce code in createTargetReduction(); NFC
The switch duplicated the translation in getRecurrenceBinOp(). This code is still weird because it translates to the TTI ReductionFlags for min/max, but then createSimpleTargetReduction() converts that back to RecurrenceDescriptor::MinMaxRecurrenceKind.
This commit is contained in:
parent
df7ddeea66
commit
8d18bc8e6d
|
@ -1063,7 +1063,6 @@ Value *llvm::createTargetReduction(IRBuilderBase &B,
|
|||
bool NoNaN) {
|
||||
// TODO: Support in-order reductions based on the recurrence descriptor.
|
||||
using RD = RecurrenceDescriptor;
|
||||
RD::RecurrenceKind RecKind = Desc.getRecurrenceKind();
|
||||
TargetTransformInfo::ReductionFlags Flags;
|
||||
Flags.NoNaN = NoNaN;
|
||||
|
||||
|
@ -1072,34 +1071,12 @@ Value *llvm::createTargetReduction(IRBuilderBase &B,
|
|||
IRBuilderBase::FastMathFlagGuard FMFGuard(B);
|
||||
B.setFastMathFlags(Desc.getFastMathFlags());
|
||||
|
||||
switch (RecKind) {
|
||||
case RD::RK_FloatAdd:
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::FAdd, Src, Flags);
|
||||
case RD::RK_FloatMult:
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::FMul, Src, Flags);
|
||||
case RD::RK_IntegerAdd:
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::Add, Src, Flags);
|
||||
case RD::RK_IntegerMult:
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::Mul, Src, Flags);
|
||||
case RD::RK_IntegerAnd:
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::And, Src, Flags);
|
||||
case RD::RK_IntegerOr:
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::Or, Src, Flags);
|
||||
case RD::RK_IntegerXor:
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::Xor, Src, Flags);
|
||||
case RD::RK_IntegerMinMax: {
|
||||
RD::MinMaxRecurrenceKind MMKind = Desc.getMinMaxRecurrenceKind();
|
||||
Flags.IsMaxOp = (MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_UIntMax);
|
||||
Flags.IsSigned = (MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_SIntMin);
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::ICmp, Src, Flags);
|
||||
}
|
||||
case RD::RK_FloatMinMax: {
|
||||
Flags.IsMaxOp = Desc.getMinMaxRecurrenceKind() == RD::MRK_FloatMax;
|
||||
return createSimpleTargetReduction(B, TTI, Instruction::FCmp, Src, Flags);
|
||||
}
|
||||
default:
|
||||
llvm_unreachable("Unhandled RecKind");
|
||||
}
|
||||
RD::MinMaxRecurrenceKind MMKind = Desc.getMinMaxRecurrenceKind();
|
||||
Flags.IsMaxOp = MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_UIntMax ||
|
||||
MMKind == RD::MRK_FloatMax;
|
||||
Flags.IsSigned = MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_SIntMin;
|
||||
return createSimpleTargetReduction(B, TTI, Desc.getRecurrenceBinOp(), Src,
|
||||
Flags);
|
||||
}
|
||||
|
||||
void llvm::propagateIRFlags(Value *I, ArrayRef<Value *> VL, Value *OpValue) {
|
||||
|
|
Loading…
Reference in New Issue