forked from OSchip/llvm-project
Vector shuffle mask elements may be "undef". Handle
this everywhere in LegalizeTypes. llvm-svn: 57783
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@ -156,8 +156,10 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
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SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
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// Figure out if the scalar is the LHS or RHS and return it.
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SDValue EltNum = N->getOperand(2).getOperand(0);
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unsigned Op = cast<ConstantSDNode>(EltNum)->getZExtValue() != 0;
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SDValue Arg = N->getOperand(2).getOperand(0);
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if (Arg.getOpcode() == ISD::UNDEF)
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return DAG.getNode(ISD::UNDEF, N->getValueType(0).getVectorElementType());
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unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
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return GetScalarizedVector(N->getOperand(Op));
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}
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@ -562,14 +564,19 @@ void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(SDNode *N, SDValue &Lo,
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// buildvector of extractelement here because the input vectors will have
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// to be legalized, so this makes the code simpler.
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for (unsigned i = 0; i != LoNumElts; ++i) {
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unsigned Idx = cast<ConstantSDNode>(Mask.getOperand(i))->getZExtValue();
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SDValue InVec = N->getOperand(0);
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if (Idx >= NumElements) {
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InVec = N->getOperand(1);
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Idx -= NumElements;
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SDValue Arg = Mask.getOperand(i);
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if (Arg.getOpcode() == ISD::UNDEF) {
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Ops.push_back(DAG.getNode(ISD::UNDEF, EltVT));
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} else {
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unsigned Idx = cast<ConstantSDNode>(Mask.getOperand(i))->getZExtValue();
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SDValue InVec = N->getOperand(0);
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if (Idx >= NumElements) {
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InVec = N->getOperand(1);
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Idx -= NumElements;
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}
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Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EltVT, InVec,
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DAG.getIntPtrConstant(Idx)));
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}
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Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EltVT, InVec,
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DAG.getIntPtrConstant(Idx)));
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}
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Lo = DAG.getNode(ISD::BUILD_VECTOR, LoVT, &Ops[0], Ops.size());
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Ops.clear();
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@ -763,7 +770,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
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return DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
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}
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SDValue DAGTypeLegalizer::SplitVecOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo){
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SDValue DAGTypeLegalizer::SplitVecOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo) {
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assert(OpNo == 2 && "Shuffle source type differs from result type?");
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SDValue Mask = N->getOperand(2);
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unsigned MaskLength = Mask.getValueType().getVectorNumElements();
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@ -802,9 +809,13 @@ SDValue DAGTypeLegalizer::SplitVecOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo){
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// Success! Rebuild the vector using the legal types.
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SmallVector<SDValue, 16> Ops(MaskLength);
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for (unsigned i = 0; i < MaskLength; ++i) {
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uint64_t Idx =
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cast<ConstantSDNode>(Mask.getOperand(i))->getZExtValue();
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Ops[i] = DAG.getConstant(Idx, OpVT);
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SDValue Arg = Mask.getOperand(i);
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if (Arg.getOpcode() == ISD::UNDEF) {
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Ops[i] = DAG.getNode(ISD::UNDEF, OpVT);
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} else {
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uint64_t Idx = cast<ConstantSDNode>(Arg)->getZExtValue();
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Ops[i] = DAG.getConstant(Idx, OpVT);
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}
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}
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return DAG.UpdateNodeOperands(SDValue(N,0),
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N->getOperand(0), N->getOperand(1),
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