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Remove some (LARGE) abandoned code for the release. If this is ever needed 

again in the future, it can be resurrected out of CVS

llvm-svn: 15112
This commit is contained in:
Chris Lattner 2004-07-22 21:30:35 +00:00
parent 68426e5ba6
commit 8d06c43f01
4 changed files with 2 additions and 2843 deletions
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7
llvm/lib/Target/X86/Makefile
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@ -13,8 +13,7 @@ include $(LEVEL)/Makefile.common
# Make sure that tblgen is run, first thing.
$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
X86GenRegisterInfo.inc X86GenInstrNames.inc \
X86GenInstrInfo.inc X86GenSimpInstrSelector.inc \
X86GenInstrSelector.inc
X86GenInstrInfo.inc X86GenInstrSelector.inc
X86GenRegisterNames.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
$(SourceDir)/../Target.td $(TBLGEN)
@ -41,10 +40,6 @@ X86GenInstrInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
@echo "Building X86.td instruction information with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
X86GenSimpInstrSelector.inc:: $(SourceDir)/X86InstrSel.td $(TBLGEN)
@echo "Building X86.td simple instruction selector with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-simp-instr-sel -o $@
X86GenInstrSelector.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
$(SourceDir)/../Target.td $(TBLGEN)
@echo "Building X86.td instruction selector with tblgen"

6
llvm/lib/Target/X86/X86.h
View File

@ -29,12 +29,6 @@ class IntrinsicLowering;
///
FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
/// createX86ReallySimpleInstructionSelector - This pass converts an LLVM
/// function into a machine code representation in an even simpler fashion
/// than above.
///
FunctionPass *createX86ReallySimpleInstructionSelector(TargetMachine &TM);
/// createX86PatternInstructionSelector - This pass converts an LLVM function
/// into a machine code representation using pattern matching and a machine
/// description file.

2826
llvm/lib/Target/X86/X86SimpInstrSelector.cpp
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File diff suppressed because it is too large Load Diff

6
llvm/lib/Target/X86/X86TargetMachine.cpp
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@ -34,8 +34,6 @@ namespace {
cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
cl::desc("Disable the X86 asm printer, for use "
"when profiling the code generator."));
cl::opt<bool> NoSimpleISel("disable-simple-isel", cl::init(true),
cl::desc("Use the hand coded 'simple' X86 instruction selector"));
// Register the target.
RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
@ -85,10 +83,8 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
if (NoPatternISel && NoSimpleISel)
if (NoPatternISel)
PM.add(createX86SimpleInstructionSelector(*this));
else if (NoPatternISel)
PM.add(createX86ReallySimpleInstructionSelector(*this));
else
PM.add(createX86PatternInstructionSelector(*this));