[X86] Add rdpid command line option and intrinsics.

Summary: This patch adds -mrdpid/-mno-rdpid and the rdpid intrinsic. The corresponding LLVM commit has already been made.

Reviewers: RKSimon, spatel, zvi, AndreiGrischenko

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42272

llvm-svn: 323047
This commit is contained in:
Craig Topper 2018-01-20 18:36:52 +00:00
parent 035bf77426
commit 8cdb94901d
9 changed files with 44 additions and 0 deletions

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@ -894,6 +894,9 @@ BUILTIN(__builtin_ia32_rdpmc, "ULLii", "")
BUILTIN(__builtin_ia32_rdtsc, "ULLi", "") BUILTIN(__builtin_ia32_rdtsc, "ULLi", "")
BUILTIN(__rdtsc, "ULLi", "") BUILTIN(__rdtsc, "ULLi", "")
BUILTIN(__builtin_ia32_rdtscp, "ULLiUi*", "") BUILTIN(__builtin_ia32_rdtscp, "ULLiUi*", "")
TARGET_BUILTIN(__builtin_ia32_rdpid, "Ui", "", "rdpid")
// PKU // PKU
TARGET_BUILTIN(__builtin_ia32_rdpkru, "Ui", "", "pku") TARGET_BUILTIN(__builtin_ia32_rdpkru, "Ui", "", "pku")
TARGET_BUILTIN(__builtin_ia32_wrpkru, "vUi", "", "pku") TARGET_BUILTIN(__builtin_ia32_wrpkru, "vUi", "", "pku")

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@ -2562,6 +2562,8 @@ def mprefetchwt1 : Flag<["-"], "mprefetchwt1">, Group<m_x86_Features_Group>;
def mno_prefetchwt1 : Flag<["-"], "mno-prefetchwt1">, Group<m_x86_Features_Group>; def mno_prefetchwt1 : Flag<["-"], "mno-prefetchwt1">, Group<m_x86_Features_Group>;
def mprfchw : Flag<["-"], "mprfchw">, Group<m_x86_Features_Group>; def mprfchw : Flag<["-"], "mprfchw">, Group<m_x86_Features_Group>;
def mno_prfchw : Flag<["-"], "mno-prfchw">, Group<m_x86_Features_Group>; def mno_prfchw : Flag<["-"], "mno-prfchw">, Group<m_x86_Features_Group>;
def mrdpid : Flag<["-"], "mrdpid">, Group<m_x86_Features_Group>;
def mno_rdpid : Flag<["-"], "mno-rdpid">, Group<m_x86_Features_Group>;
def mrdrnd : Flag<["-"], "mrdrnd">, Group<m_x86_Features_Group>; def mrdrnd : Flag<["-"], "mrdrnd">, Group<m_x86_Features_Group>;
def mno_rdrnd : Flag<["-"], "mno-rdrnd">, Group<m_x86_Features_Group>; def mno_rdrnd : Flag<["-"], "mno-rdrnd">, Group<m_x86_Features_Group>;
def mrtm : Flag<["-"], "mrtm">, Group<m_x86_Features_Group>; def mrtm : Flag<["-"], "mrtm">, Group<m_x86_Features_Group>;

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@ -160,6 +160,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "avx512vnni", true); setFeatureEnabledImpl(Features, "avx512vnni", true);
setFeatureEnabledImpl(Features, "avx512vbmi2", true); setFeatureEnabledImpl(Features, "avx512vbmi2", true);
setFeatureEnabledImpl(Features, "avx512vpopcntdq", true); setFeatureEnabledImpl(Features, "avx512vpopcntdq", true);
setFeatureEnabledImpl(Features, "rdpid", true);
LLVM_FALLTHROUGH; LLVM_FALLTHROUGH;
case CK_Cannonlake: case CK_Cannonlake:
setFeatureEnabledImpl(Features, "avx512ifma", true); setFeatureEnabledImpl(Features, "avx512ifma", true);
@ -784,6 +785,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasPREFETCHWT1 = true; HasPREFETCHWT1 = true;
} else if (Feature == "+clzero") { } else if (Feature == "+clzero") {
HasCLZERO = true; HasCLZERO = true;
} else if (Feature == "+rdpid") {
HasRDPID = true;
} }
X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature) X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
@ -1123,6 +1126,8 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__PREFETCHWT1__"); Builder.defineMacro("__PREFETCHWT1__");
if (HasCLZERO) if (HasCLZERO)
Builder.defineMacro("__CLZERO__"); Builder.defineMacro("__CLZERO__");
if (HasRDPID)
Builder.defineMacro("__RDPID__");
// Each case falls through to the previous one here. // Each case falls through to the previous one here.
switch (SSELevel) { switch (SSELevel) {
@ -1253,6 +1258,7 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const {
.Case("popcnt", true) .Case("popcnt", true)
.Case("prefetchwt1", true) .Case("prefetchwt1", true)
.Case("prfchw", true) .Case("prfchw", true)
.Case("rdpid", true)
.Case("rdrnd", true) .Case("rdrnd", true)
.Case("rdseed", true) .Case("rdseed", true)
.Case("rtm", true) .Case("rtm", true)
@ -1324,6 +1330,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
.Case("popcnt", HasPOPCNT) .Case("popcnt", HasPOPCNT)
.Case("prefetchwt1", HasPREFETCHWT1) .Case("prefetchwt1", HasPREFETCHWT1)
.Case("prfchw", HasPRFCHW) .Case("prfchw", HasPRFCHW)
.Case("rdpid", HasRDPID)
.Case("rdrnd", HasRDRND) .Case("rdrnd", HasRDRND)
.Case("rdseed", HasRDSEED) .Case("rdseed", HasRDSEED)
.Case("rtm", HasRTM) .Case("rtm", HasRTM)

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@ -96,6 +96,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
bool HasCLWB = false; bool HasCLWB = false;
bool HasMOVBE = false; bool HasMOVBE = false;
bool HasPREFETCHWT1 = false; bool HasPREFETCHWT1 = false;
bool HasRDPID = false;
/// \brief Enumeration of all of the X86 CPUs supported by Clang. /// \brief Enumeration of all of the X86 CPUs supported by Clang.
/// ///

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@ -247,6 +247,18 @@ _mm256_cvtph_ps(__m128i __a)
#include <gfniintrin.h> #include <gfniintrin.h>
#endif #endif
#if !defined(_MSC_VER) || __has_feature(modules) || defined(__RDPID__)
/// \brief Returns the value of the IA32_TSC_AUX MSR (0xc0000103).
///
/// \headerfile <immintrin.h>
///
/// This intrinsic corresponds to the <c> RDPID </c> instruction.
static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("rdpid")))
_rdpid_u32(void) {
return __builtin_ia32_rdpid();
}
#endif // __RDPID__
#if !defined(_MSC_VER) || __has_feature(modules) || defined(__RDRND__) #if !defined(_MSC_VER) || __has_feature(modules) || defined(__RDRND__)
static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
_rdrand16_step(unsigned short *__p) _rdrand16_step(unsigned short *__p)

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@ -0,0 +1,10 @@
// RUN: %clang_cc1 -ffreestanding -triple x86_64-unknown-unknown -target-feature +rdpid -emit-llvm -o - %s | FileCheck %s
#include <x86intrin.h>
unsigned int test_rdpid_u32(void) {
// CHECK-LABEL: @test_rdpid_u32
// CHECK: call i32 @llvm.x86.rdpid
return _rdpid_u32();
}

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@ -125,3 +125,7 @@
// VBMI2: "-target-feature" "+avx512vbmi2" // VBMI2: "-target-feature" "+avx512vbmi2"
// NO-VBMI2: "-target-feature" "-avx512vbmi2" // NO-VBMI2: "-target-feature" "-avx512vbmi2"
// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mrdpid %s -### -o %t.o 2>&1 | FileCheck -check-prefix=RDPID %s
// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-rdpid %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-RDPID %s
// RDPID: "-target-feature" "+rdpid"
// NO-RDPID: "-target-feature" "-rdpid"

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@ -1086,6 +1086,7 @@
// CHECK_ICL_M32: #define __PKU__ 1 // CHECK_ICL_M32: #define __PKU__ 1
// CHECK_ICL_M32: #define __POPCNT__ 1 // CHECK_ICL_M32: #define __POPCNT__ 1
// CHECK_ICL_M32: #define __PRFCHW__ 1 // CHECK_ICL_M32: #define __PRFCHW__ 1
// CHECK_ICL_M32: #define __RDPID__ 1
// CHECK_ICL_M32: #define __RDRND__ 1 // CHECK_ICL_M32: #define __RDRND__ 1
// CHECK_ICL_M32: #define __RDSEED__ 1 // CHECK_ICL_M32: #define __RDSEED__ 1
// CHECK_ICL_M32: #define __RTM__ 1 // CHECK_ICL_M32: #define __RTM__ 1
@ -1141,6 +1142,7 @@
// CHECK_ICL_M64: #define __PKU__ 1 // CHECK_ICL_M64: #define __PKU__ 1
// CHECK_ICL_M64: #define __POPCNT__ 1 // CHECK_ICL_M64: #define __POPCNT__ 1
// CHECK_ICL_M64: #define __PRFCHW__ 1 // CHECK_ICL_M64: #define __PRFCHW__ 1
// CHECK_ICL_M64: #define __RDPID__ 1
// CHECK_ICL_M64: #define __RDRND__ 1 // CHECK_ICL_M64: #define __RDRND__ 1
// CHECK_ICL_M64: #define __RDSEED__ 1 // CHECK_ICL_M64: #define __RDSEED__ 1
// CHECK_ICL_M64: #define __RTM__ 1 // CHECK_ICL_M64: #define __RTM__ 1

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@ -436,3 +436,6 @@
// VPCLMULQDQNOPCLMUL-NOT: #define __PCLMUL__ 1 // VPCLMULQDQNOPCLMUL-NOT: #define __PCLMUL__ 1
// VPCLMULQDQNOPCLMUL-NOT: #define __VPCLMULQDQ__ 1 // VPCLMULQDQNOPCLMUL-NOT: #define __VPCLMULQDQ__ 1
// RUN: %clang -target i386-unknown-unknown -march=atom -mrdpid -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=RDPID %s
// RDPID: #define __RDPID__ 1