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AArch64: support post-indexed stores to bfloat types.

This commit is contained in:
Tim Northover 2021-05-26 09:10:40 +01:00
parent 942e01de89
commit 8c5ac18d71
2 changed files with 46 additions and 0 deletions
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7
llvm/lib/Target/AArch64/AArch64InstrInfo.td
View File

@ -3585,6 +3585,9 @@ def : Pat<(post_truncsti8 GPR64:$Rt, GPR64sp:$addr, simm9:$off),
(STRBBpost (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$addr,
simm9:$off)>;
def : Pat<(post_store (bf16 FPR16:$Rt), GPR64sp:$addr, simm9:$off),
(STRHpost FPR16:$Rt, GPR64sp:$addr, simm9:$off)>;
def : Pat<(post_store (v8i8 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
(STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
def : Pat<(post_store (v4i16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
@ -3599,6 +3602,8 @@ def : Pat<(post_store (v1f64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
(STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
def : Pat<(post_store (v4f16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
(STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
def : Pat<(post_store (v4bf16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
(STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
def : Pat<(post_store (v16i8 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
(STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
@ -3614,6 +3619,8 @@ def : Pat<(post_store (v2f64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
(STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
def : Pat<(post_store (v8f16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
(STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
def : Pat<(post_store (v8bf16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
(STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
//===----------------------------------------------------------------------===//
// Load/store exclusive instructions.

39
llvm/test/CodeGen/AArch64/bf16.ll
View File

@ -43,3 +43,42 @@ define <8 x bfloat> @test_build_vector_const() {
; CHECK: dup v0.8h, [[TMP]]
ret <8 x bfloat> <bfloat 0xR3F80, bfloat 0xR3F80, bfloat 0xR3F80, bfloat 0xR3F80, bfloat 0xR3F80, bfloat 0xR3F80, bfloat 0xR3F80, bfloat 0xR3F80>
}
define { bfloat, bfloat* } @test_store_post(bfloat %val, bfloat* %ptr) {
; CHECK-LABEL: test_store_post:
; CHECK: str h0, [x0], #2
store bfloat %val, bfloat* %ptr
%res.tmp = insertvalue { bfloat, bfloat* } undef, bfloat %val, 0
%next = getelementptr bfloat, bfloat* %ptr, i32 1
%res = insertvalue { bfloat, bfloat* } %res.tmp, bfloat* %next, 1
ret { bfloat, bfloat* } %res
}
define { <4 x bfloat>, <4 x bfloat>* } @test_store_post_v4bf16(<4 x bfloat> %val, <4 x bfloat>* %ptr) {
; CHECK-LABEL: test_store_post_v4bf16:
; CHECK: str d0, [x0], #8
store <4 x bfloat> %val, <4 x bfloat>* %ptr
%res.tmp = insertvalue { <4 x bfloat>, <4 x bfloat>* } undef, <4 x bfloat> %val, 0
%next = getelementptr <4 x bfloat>, <4 x bfloat>* %ptr, i32 1
%res = insertvalue { <4 x bfloat>, <4 x bfloat>* } %res.tmp, <4 x bfloat>* %next, 1
ret { <4 x bfloat>, <4 x bfloat>* } %res
}
define { <8 x bfloat>, <8 x bfloat>* } @test_store_post_v8bf16(<8 x bfloat> %val, <8 x bfloat>* %ptr) {
; CHECK-LABEL: test_store_post_v8bf16:
; CHECK: str q0, [x0], #16
store <8 x bfloat> %val, <8 x bfloat>* %ptr
%res.tmp = insertvalue { <8 x bfloat>, <8 x bfloat>* } undef, <8 x bfloat> %val, 0
%next = getelementptr <8 x bfloat>, <8 x bfloat>* %ptr, i32 1
%res = insertvalue { <8 x bfloat>, <8 x bfloat>* } %res.tmp, <8 x bfloat>* %next, 1
ret { <8 x bfloat>, <8 x bfloat>* } %res
}