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Rename Int_CVTSI642SSr* to Int_CVTSI2SS64r* for naming consistency and remove unused instructions. 

llvm-svn: 45861
This commit is contained in:
Evan Cheng 2008-01-11 07:37:44 +00:00
parent 9283173061
commit 8c51394e01
1 changed files with 16 additions and 26 deletions
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42
llvm/lib/Target/X86/X86Instr64bit.td
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@ -1028,6 +1028,7 @@ def CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src),
def CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), def CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src),
"cvtsi2sd{q}\t{$src, $dst|$dst, $src}", "cvtsi2sd{q}\t{$src, $dst|$dst, $src}",
[(set FR64:$dst, (sint_to_fp (loadi64 addr:$src)))]>; [(set FR64:$dst, (sint_to_fp (loadi64 addr:$src)))]>;
let isTwoAddress = 1 in { let isTwoAddress = 1 in {
def Int_CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, def Int_CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, GR64:$src2), (outs VR128:$dst), (ins VR128:$src1, GR64:$src2),
@ -1050,17 +1051,21 @@ def CVTSI2SS64rr: RSSI<0x2A, MRMSrcReg, (outs FR32:$dst), (ins GR64:$src),
def CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (outs FR32:$dst), (ins i64mem:$src), def CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (outs FR32:$dst), (ins i64mem:$src),
"cvtsi2ss{q}\t{$src, $dst|$dst, $src}", "cvtsi2ss{q}\t{$src, $dst|$dst, $src}",
[(set FR32:$dst, (sint_to_fp (loadi64 addr:$src)))]>; [(set FR32:$dst, (sint_to_fp (loadi64 addr:$src)))]>;
let isTwoAddress = 1, neverHasSideEffects = 1 in {
def Int_CVTSI2SS64rr: RSSI<0x2A, MRMSrcReg, let isTwoAddress = 1 in {
(outs VR128:$dst), (ins VR128:$src1, GR64:$src2), def Int_CVTSI2SS64rr : RSSI<0x2A, MRMSrcReg,
"cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", (outs VR128:$dst), (ins VR128:$src1, GR64:$src2),
[]>; // TODO: add intrinsic "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}",
let mayLoad = 1 in [(set VR128:$dst,
def Int_CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (int_x86_sse_cvtsi642ss VR128:$src1,
(outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), GR64:$src2))]>;
"cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", def Int_CVTSI2SS64rm : RSSI<0x2A, MRMSrcMem,
[]>; // TODO: add intrinsic (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2),
} // isTwoAddress "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}",
[(set VR128:$dst,
(int_x86_sse_cvtsi642ss VR128:$src1,
(loadi64 addr:$src2)))]>;
}
// f32 -> signed i64 // f32 -> signed i64
def Int_CVTSS2SI64rr: RSSI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), def Int_CVTSS2SI64rr: RSSI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src),
@ -1086,21 +1091,6 @@ def Int_CVTTSS2SI64rm: RSSI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src)
[(set GR64:$dst, [(set GR64:$dst,
(int_x86_sse_cvttss2si64 (load addr:$src)))]>; (int_x86_sse_cvttss2si64 (load addr:$src)))]>;
let isTwoAddress = 1 in {
def Int_CVTSI642SSrr : RSSI<0x2A, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, GR64:$src2),
"cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}",
[(set VR128:$dst,
(int_x86_sse_cvtsi642ss VR128:$src1,
GR64:$src2))]>;
def Int_CVTSI642SSrm : RSSI<0x2A, MRMSrcMem,
(outs VR128:$dst), (ins VR128:$src1, i64mem:$src2),
"cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}",
[(set VR128:$dst,
(int_x86_sse_cvtsi642ss VR128:$src1,
(loadi64 addr:$src2)))]>;
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Alias Instructions // Alias Instructions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//