forked from OSchip/llvm-project
[ARM] FP16 mov imm pattern
This is a follow up of r324321, adding a match pattern for mov with a FP16 immediate (also fixing operand vfp_f16imm that wasn't even compiling). Differential Revision: https://reviews.llvm.org/D42973 llvm-svn: 324456
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@ -44,7 +44,7 @@ def vfp_f16imm : Operand<f16>,
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}], SDNodeXForm<fpimm, [{
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}], SDNodeXForm<fpimm, [{
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APFloat InVal = N->getValueAPF();
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APFloat InVal = N->getValueAPF();
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uint32_t enc = ARM_AM::getFP16Imm(InVal);
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uint32_t enc = ARM_AM::getFP16Imm(InVal);
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return CurDAG->getTargetConstant(enc, MVT::i32);
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return CurDAG->getTargetConstant(enc, SDLoc(N), MVT::i32);
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}]>> {
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}]>> {
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let PrintMethod = "printFPImmOperand";
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let PrintMethod = "printFPImmOperand";
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let ParserMatchClass = FPImmOperand;
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let ParserMatchClass = FPImmOperand;
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@ -2343,10 +2343,11 @@ def FCONSTS : VFPAI<(outs SPR:$Sd), (ins vfp_f32imm:$imm),
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let Inst{3-0} = imm{3-0};
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let Inst{3-0} = imm{3-0};
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}
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}
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def FCONSTH : VFPAI<(outs SPR:$Sd), (ins vfp_f16imm:$imm),
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def FCONSTH : VFPAI<(outs HPR:$Sd), (ins vfp_f16imm:$imm),
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VFPMiscFrm, IIC_fpUNA16,
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VFPMiscFrm, IIC_fpUNA16,
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"vmov", ".f16\t$Sd, $imm",
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"vmov", ".f16\t$Sd, $imm",
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[]>, Requires<[HasFullFP16]> {
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[(set HPR:$Sd, vfp_f16imm:$imm)]>,
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Requires<[HasFullFP16]> {
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bits<5> Sd;
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bits<5> Sd;
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bits<8> imm;
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bits<8> imm;
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@ -471,7 +471,20 @@ entry:
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; TODO: fix immediates.
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; TODO: fix immediates.
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; 21. VMOV (between general-purpose register and half-precision register)
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; 21. VMOV (between general-purpose register and half-precision register)
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; 22. VMOV (immediate)
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; 22. VMOV (immediate)
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define i32 @movi(i32 %a.coerce) {
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entry:
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%tmp.0.extract.trunc = trunc i32 %a.coerce to i16
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%0 = bitcast i16 %tmp.0.extract.trunc to half
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%add = fadd half %0, 0xHC000
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%1 = bitcast half %add to i16
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%tmp2.0.insert.ext = zext i16 %1 to i32
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ret i32 %tmp2.0.insert.ext
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; CHECK-LABEL: movi:
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; CHECK-HARDFP-FULLFP16: vmov.f16 s0, #-2.000000e+00
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}
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; 23. VMUL
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; 23. VMUL
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define float @Mul(float %a.coerce, float %b.coerce) {
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define float @Mul(float %a.coerce, float %b.coerce) {
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