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AMDGPU: Use Register

This commit is contained in:
Matt Arsenault 2020-12-18 10:51:17 -05:00
parent bac54639c7
commit 8bf9cdeaee
1 changed files with 3 additions and 2 deletions
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5
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
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@ -98,7 +98,7 @@ static void insertCSRSaves(MachineBasicBlock &SaveBlock,
if (!TFI->spillCalleeSavedRegisters(SaveBlock, I, CSI, TRI)) {
for (const CalleeSavedInfo &CS : CSI) {
// Insert the spill to the stack frame.
unsigned Reg = CS.getReg();
MCRegister Reg = CS.getReg();
MachineInstrSpan MIS(I, &SaveBlock);
const TargetRegisterClass *RC =
@ -217,7 +217,8 @@ bool SILowerSGPRSpills::spillCalleeSavedRegs(MachineFunction &MF) {
const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs();
for (unsigned I = 0; CSRegs[I]; ++I) {
unsigned Reg = CSRegs[I];
MCRegister Reg = CSRegs[I];
if (SavedRegs.test(Reg)) {
const TargetRegisterClass *RC =
TRI->getMinimalPhysRegClass(Reg, MVT::i32);