forked from OSchip/llvm-project
parent
96933de7f5
commit
8b2a3d1fea
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@ -21,7 +21,6 @@
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cstdio>
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using namespace llvm;
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@ -10,7 +10,7 @@
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// This file contains the Mips16 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include <stdio.h>
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#include "Mips16InstrInfo.h"
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#include "InstPrinter/MipsInstPrinter.h"
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#include "MipsMachineFunction.h"
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@ -473,7 +473,6 @@ const MipsInstrInfo *llvm::createMips16InstrInfo(MipsTargetMachine &TM) {
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return new Mips16InstrInfo(TM);
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}
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#include <stdio.h>
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bool Mips16InstrInfo::validImmediate(unsigned Opcode, unsigned Reg,
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int64_t Amount) {
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switch (Opcode) {
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@ -493,6 +492,5 @@ bool Mips16InstrInfo::validImmediate(unsigned Opcode, unsigned Reg,
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return isInt<16>(Amount);
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return isInt<15>(Amount);
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}
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printf("Unexpected opcode %i \n", Opcode);
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llvm_unreachable("unexpected Opcode in validImmediate");
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}
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@ -21,7 +21,6 @@
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include <cstdio>
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using namespace llvm;
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@ -13,7 +13,6 @@
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//===----------------------------------------------------------------------===//
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#include "AMDGPUSubtarget.h"
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#include <stdio.h>
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using namespace llvm;
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@ -24,7 +24,6 @@
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/raw_ostream.h"
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#include <stdio.h>
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using namespace llvm;
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@ -19,7 +19,6 @@
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/MC/MCInstrDesc.h"
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#include <stdio.h>
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using namespace llvm;
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