From 8b24e64014efcef3ab56a98ea262cc0c01a03628 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad@amd.com>
Date: Mon, 22 Aug 2022 16:35:46 +0100
Subject: [PATCH] [InstCombine] Add tests for D130075

Differential Revision: https://reviews.llvm.org/D132381
---
 llvm/test/Transforms/InstCombine/add2.ll | 28 ++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/add2.ll b/llvm/test/Transforms/InstCombine/add2.ll
index dee866f2fba4..811727be7a37 100644
--- a/llvm/test/Transforms/InstCombine/add2.ll
+++ b/llvm/test/Transforms/InstCombine/add2.ll
@@ -472,3 +472,31 @@ define i32 @add_of_selects(i1 %A, i32 %B) {
   %add = add i32 %sel0, %sel1
   ret i32 %add
 }
+
+; The ADD can't cause overflow out of the low 4 bits so the OR can be removed.
+
+define i32 @add_undemanded_low_bits(i32 %x) {
+; CHECK-LABEL: @add_undemanded_low_bits(
+; CHECK-NEXT:    [[OR:%.*]] = or i32 [[X:%.*]], 15
+; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[OR]], 1616
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i32 [[ADD]], 4
+; CHECK-NEXT:    ret i32 [[SHR]]
+;
+  %or = or i32 %x, 15
+  %add = add i32 %or, 1616
+  %shr = lshr i32 %add, 4
+  ret i32 %shr
+}
+
+define i32 @sub_undemanded_low_bits(i32 %x) {
+; CHECK-LABEL: @sub_undemanded_low_bits(
+; CHECK-NEXT:    [[OR:%.*]] = or i32 [[X:%.*]], 15
+; CHECK-NEXT:    [[SUB:%.*]] = add i32 [[OR]], -1616
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i32 [[SUB]], 4
+; CHECK-NEXT:    ret i32 [[SHR]]
+;
+  %or = or i32 %x, 15
+  %sub = sub i32 %or, 1616
+  %shr = lshr i32 %sub, 4
+  ret i32 %shr
+}