forked from OSchip/llvm-project
[AMDGPU] Enabled v2.16 literals for VOP3P
Literal encoding needs op_sel_hi to select low 16 bit in this case. Differential Revision: https://reviews.llvm.org/D45745 llvm-svn: 330230
This commit is contained in:
Stanislav Mekhanoshin
parent
4b9b9fb7a0
commit
8b20b7dc2b
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@ -155,6 +155,25 @@ static bool updateOperand(FoldCandidate &Fold,
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assert(Old.isReg());
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if (Fold.isImm()) {
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if (MI->getDesc().TSFlags & SIInstrFlags::IsPacked) {
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// Set op_sel_hi on this operand or bail out if op_sel is already set.
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unsigned Opcode = MI->getOpcode();
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int OpNo = MI->getOperandNo(&Old);
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int ModIdx = -1;
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if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0))
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ModIdx = AMDGPU::OpName::src0_modifiers;
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else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1))
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ModIdx = AMDGPU::OpName::src1_modifiers;
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else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2))
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ModIdx = AMDGPU::OpName::src2_modifiers;
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assert(ModIdx != -1);
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ModIdx = AMDGPU::getNamedOperandIdx(Opcode, ModIdx);
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MachineOperand &Mod = MI->getOperand(ModIdx);
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unsigned Val = Mod.getImm();
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if ((Val & SISrcMods::OP_SEL_0) || !(Val & SISrcMods::OP_SEL_1))
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return false;
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Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);
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}
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Old.ChangeToImmediate(Fold.ImmToFold);
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return true;
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}
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@ -97,11 +97,6 @@ unsigned getVmcntBitWidthHi() { return 2; }
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namespace llvm {
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static cl::opt<bool> EnablePackedInlinableLiterals(
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"enable-packed-inlinable-literals",
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cl::desc("Enable packed inlinable literals (v2f16, v2i16)"),
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cl::init(false));
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namespace AMDGPU {
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LLVM_READNONE
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@ -877,9 +872,6 @@ bool isInlinableLiteral16(int16_t Literal, bool HasInv2Pi) {
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bool isInlinableLiteralV216(int32_t Literal, bool HasInv2Pi) {
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assert(HasInv2Pi);
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if (!EnablePackedInlinableLiterals)
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return false;
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int16_t Lo16 = static_cast<int16_t>(Literal);
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int16_t Hi16 = static_cast<int16_t>(Literal >> 16);
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return Lo16 == Hi16 && isInlinableLiteral16(Lo16, HasInv2Pi);
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@ -1,4 +1,4 @@
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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@ -96,7 +96,7 @@ define amdgpu_kernel void @v_test_add_v2i16_neg_constant(<2 x i16> addrspace(1)*
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}
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; GCN-LABEL: {{^}}v_test_add_v2i16_inline_neg1:
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; GFX9: v_pk_add_u16 v{{[0-9]+}}, v{{[0-9]+}}, -1{{$}}
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; GFX9: v_pk_add_u16 v{{[0-9]+}}, v{{[0-9]+}}, -1 op_sel_hi:[1,0]{{$}}
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; VI: v_mov_b32_e32 v[[SCONST:[0-9]+]], -1
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; VI: flat_load_ushort [[LOAD0:v[0-9]+]]
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@ -1,4 +1,4 @@
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=CIVI %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=CIVI %s
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@ -188,9 +188,8 @@ define amdgpu_kernel void @v_clamp_mac_to_mad(float addrspace(1)* %out, float ad
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; GCN-LABEL: {{^}}v_clamp_add_src_v2f16_denorm:
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9-DAG: s_mov_b32 [[ONE:s[0-9]+]], 0x3c003c00
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], [[ONE]] clamp{{$}}
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; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], 1.0 op_sel_hi:[1,0] clamp{{$}}
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define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
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@ -204,9 +203,8 @@ define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm(<2 x half> addrspace(1)*
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}
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; GCN-LABEL: {{^}}v_clamp_add_src_v2f16_no_denormals:
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9-DAG: s_mov_b32 [[ONE:s[0-9]+]], 0x3c003c00
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], [[ONE]] clamp{{$}}
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; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], 1.0 op_sel_hi:[1,0] clamp{{$}}
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define amdgpu_kernel void @v_clamp_add_src_v2f16_no_denormals(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #3 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid
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@ -220,9 +218,8 @@ define amdgpu_kernel void @v_clamp_add_src_v2f16_no_denormals(<2 x half> addrspa
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}
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; GCN-LABEL: {{^}}v_clamp_add_src_v2f16_denorm_neg:
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9-DAG: s_mov_b32 [[ONE:s[0-9]+]], 0x3c003c00
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], [[ONE]]{{$}}
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; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], 1.0 op_sel_hi:[1,0]{{$}}
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; GFX9: v_pk_max_f16 [[MAX:v[0-9]+]], [[ADD]], [[ADD]] neg_lo:[1,1] neg_hi:[1,1] clamp{{$}}
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define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm_neg(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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@ -238,9 +235,8 @@ define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm_neg(<2 x half> addrspace
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}
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; GCN-LABEL: {{^}}v_clamp_add_src_v2f16_denorm_neg_lo:
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9-DAG: s_mov_b32 [[ONE:s[0-9]+]], 0x3c003c00
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], [[ONE]]{{$}}
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; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], 1.0 op_sel_hi:[1,0]{{$}}
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; GFX9: v_pk_max_f16 [[MAX:v[0-9]+]], [[ADD]], [[ADD]] neg_lo:[1,1] clamp{{$}}
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define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm_neg_lo(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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@ -258,9 +254,8 @@ define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm_neg_lo(<2 x half> addrsp
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}
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; GCN-LABEL: {{^}}v_clamp_add_src_v2f16_denorm_neg_hi:
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9-DAG: s_mov_b32 [[ONE:s[0-9]+]], 0x3c003c00
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], [[ONE]]{{$}}
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; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], 1.0 op_sel_hi:[1,0]{{$}}
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; GFX9: v_pk_max_f16 [[MAX:v[0-9]+]], [[ADD]], [[ADD]] neg_hi:[1,1] clamp{{$}}
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define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm_neg_hi(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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@ -278,9 +273,8 @@ define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm_neg_hi(<2 x half> addrsp
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}
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; GCN-LABEL: {{^}}v_clamp_add_src_v2f16_denorm_shuf:
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9-DAG: s_mov_b32 [[ONE:s[0-9]+]], 0x3c003c00
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], [[ONE]]{{$}}
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; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], 1.0 op_sel_hi:[1,0]{{$}}
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; GFX9: v_pk_max_f16 [[MAX:v[0-9]+]], [[ADD]], [[ADD]] op_sel:[1,1] op_sel_hi:[0,0] clamp{{$}}
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define amdgpu_kernel void @v_clamp_add_src_v2f16_denorm_shuf(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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@ -315,9 +309,8 @@ define amdgpu_kernel void @v_no_clamp_add_src_v2f16_f32_src(<2 x half> addrspace
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}
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; GCN-LABEL: {{^}}v_no_clamp_add_packed_src_f32:
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9-DAG: s_mov_b32 [[ONE:s[0-9]+]], 0x3c003c00
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], [[ONE]]{{$}}
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; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]]
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; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], [[A]], 1.0 op_sel_hi:[1,0]{{$}}
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; GFX9: v_max_f32_e64 [[CLAMP:v[0-9]+]], [[ADD]], [[ADD]] clamp{{$}}
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define amdgpu_kernel void @v_no_clamp_add_packed_src_f32(float addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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@ -1,5 +1,5 @@
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
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declare half @llvm.fabs.f16(half) #0
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declare half @llvm.canonicalize.f16(half) #0
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@ -1,12 +1,12 @@
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=on -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=on -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=on -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=on -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-FLUSH,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=on -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-DENORM-STRICT,GFX9-DENORM,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=on -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-DENORM-STRICT,GFX9-DENORM,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-DENORM-CONTRACT,GFX9-DENORM,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-DENORM-CONTRACT,GFX9-DENORM,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=on -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-DENORM-STRICT,GFX9-DENORM,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=on -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-DENORM-STRICT,GFX9-DENORM,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-DENORM-CONTRACT,GFX9-DENORM,GFX9 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=+fp64-fp16-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-DENORM-CONTRACT,GFX9-DENORM,GFX9 %s
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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declare <2 x half> @llvm.fmuladd.v2f16(<2 x half>, <2 x half>, <2 x half>) #1
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@ -1,6 +1,6 @@
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN -check-prefix=CIVI %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GFX89 -check-prefix=GCN -check-prefix=CIVI %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GFX89 -check-prefix=GFX9 -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX89 -check-prefix=GFX9 -check-prefix=GCN %s
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; GCN-LABEL: {{^}}fneg_fabs_fadd_f16:
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; CI: v_cvt_f32_f16_e32
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@ -124,7 +124,7 @@ define amdgpu_kernel void @fneg_fabs_v4f16(<4 x half> addrspace(1)* %out, <4 x h
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; VI: v_mul_f16_sdwa v{{[0-9]+}}, -|v{{[0-9]+}}|, v{{[0-9]+}} dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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; GFX9: s_and_b32 [[ABS:s[0-9]+]], s{{[0-9]+}}, 0x7fff7fff
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; GFX9: v_pk_mul_f16 v{{[0-9]+}}, [[ABS]], 4.0 neg_lo:[1,0] neg_hi:[1,0]
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; GFX9: v_pk_mul_f16 v{{[0-9]+}}, [[ABS]], 4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]
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define amdgpu_kernel void @fold_user_fneg_fabs_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %in) #0 {
|
||||
%fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
|
||||
%fneg.fabs = fsub <2 x half> <half -0.0, half -0.0>, %fabs
|
||||
|
|
@ -147,7 +147,7 @@ define amdgpu_kernel void @s_fneg_multi_use_fabs_v2f16(<2 x half> addrspace(1)*
|
|||
|
||||
; GCN-LABEL: {{^}}s_fneg_multi_use_fabs_foldable_neg_v2f16:
|
||||
; GFX9: s_and_b32 [[ABS:s[0-9]+]], s{{[0-9]+}}, 0x7fff7fff
|
||||
; GFX9: v_pk_mul_f16 v{{[0-9]+}}, [[ABS]], 4.0 neg_lo:[1,0] neg_hi:[1,0]
|
||||
; GFX9: v_pk_mul_f16 v{{[0-9]+}}, [[ABS]], 4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]
|
||||
define amdgpu_kernel void @s_fneg_multi_use_fabs_foldable_neg_v2f16(<2 x half> addrspace(1)* %out0, <2 x half> addrspace(1)* %out1, <2 x half> %in) {
|
||||
%fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
|
||||
%fneg = fsub <2 x half> <half -0.0, half -0.0>, %fabs
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=kaveri -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI %s
|
||||
; FIXME: Merge into imm.ll
|
||||
|
|
@ -117,7 +117,7 @@ define amdgpu_kernel void @store_literal_imm_v2f16(<2 x half> addrspace(1)* %out
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_0.0_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -135,7 +135,7 @@ define amdgpu_kernel void @add_inline_imm_0.0_v2f16(<2 x half> addrspace(1)* %ou
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_0.5_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0.5{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0.5 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -153,7 +153,7 @@ define amdgpu_kernel void @add_inline_imm_0.5_v2f16(<2 x half> addrspace(1)* %ou
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_neg_0.5_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -0.5{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -0.5 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -171,7 +171,7 @@ define amdgpu_kernel void @add_inline_imm_neg_0.5_v2f16(<2 x half> addrspace(1)*
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_1.0_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 1.0{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 1.0 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -189,7 +189,7 @@ define amdgpu_kernel void @add_inline_imm_1.0_v2f16(<2 x half> addrspace(1)* %ou
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_neg_1.0_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -1.0{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -1.0 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -207,7 +207,7 @@ define amdgpu_kernel void @add_inline_imm_neg_1.0_v2f16(<2 x half> addrspace(1)*
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_2.0_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 2.0{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 2.0 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -225,7 +225,7 @@ define amdgpu_kernel void @add_inline_imm_2.0_v2f16(<2 x half> addrspace(1)* %ou
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_neg_2.0_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -2.0{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -2.0 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -243,7 +243,7 @@ define amdgpu_kernel void @add_inline_imm_neg_2.0_v2f16(<2 x half> addrspace(1)*
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_4.0_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 4.0{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 4.0 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -261,7 +261,7 @@ define amdgpu_kernel void @add_inline_imm_4.0_v2f16(<2 x half> addrspace(1)* %ou
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_neg_4.0_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -4.0{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -4.0 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -318,7 +318,7 @@ define amdgpu_kernel void @commute_add_literal_v2f16(<2 x half> addrspace(1)* %o
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_1_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 1{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 1 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -336,7 +336,7 @@ define amdgpu_kernel void @add_inline_imm_1_v2f16(<2 x half> addrspace(1)* %out,
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_2_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 2{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 2 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
@ -354,7 +354,7 @@ define amdgpu_kernel void @add_inline_imm_2_v2f16(<2 x half> addrspace(1)* %out,
|
|||
|
||||
; GCN-LABEL: {{^}}add_inline_imm_16_v2f16:
|
||||
; GFX9: s_load_dword [[VAL:s[0-9]+]]
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 16{{$}}
|
||||
; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 16 op_sel_hi:[1,0]{{$}}
|
||||
; GFX9: buffer_store_dword [[REG]]
|
||||
|
||||
; VI: buffer_load_ushort [[VAL0:v[0-9]+]]
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
|
||||
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=CIVI %s
|
||||
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=CIVI %s
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mtriple=amdgcn---amdgiz -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI -check-prefix=GFX89 -check-prefix=FUNC %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GFX9 -check-prefix=GFX89 -check-prefix=FUNC %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GFX9 -check-prefix=GFX89 -check-prefix=FUNC %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mtriple=r600---amdgiz -mcpu=cypress < %s | FileCheck -enable-var-scope -check-prefix=EG -check-prefix=FUNC %s
|
||||
|
||||
; FIXME: i16 promotion pass ruins the scalar cases when legal.
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
|
||||
; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=CIVI %s
|
||||
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=CIVI %s
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=CIVI -check-prefix=GCN %s
|
||||
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=CIVI -check-prefix=GCN %s
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs -enable-packed-inlinable-literals < %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
|
||||
; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
|
||||
|
||||
; FIXME: Need to handle non-uniform case for function below (load without gep).
|
||||
|
|
@ -93,7 +93,7 @@ define amdgpu_kernel void @v_test_sub_v2i16_neg_constant(<2 x i16> addrspace(1)*
|
|||
}
|
||||
|
||||
; GCN-LABEL: {{^}}v_test_sub_v2i16_inline_neg1:
|
||||
; GFX9: v_pk_sub_i16 v{{[0-9]+}}, v{{[0-9]+}}, -1{{$}}
|
||||
; GFX9: v_pk_sub_i16 v{{[0-9]+}}, v{{[0-9]+}}, -1 op_sel_hi:[1,0]{{$}}
|
||||
|
||||
; VI: v_mov_b32_e32 [[ONE:v[0-9]+]], 1
|
||||
; VI: flat_load_ushort [[LOAD0:v[0-9]+]]
|
||||
|
|
|
|||
Loading…
Reference in New Issue