[multiversion] Switch all of the targets over to use the

TargetIRAnalysis access path directly rather than implementing getTTI.

This even removes getTTI from the interface. It's more efficient for
each target to just register a precise callback that creates their
specific TTI.

As part of this, all of the targets which are building their subtargets
individually per-function now build their TTI instance with the function
and thus look up the correct subtarget and cache it. NVPTX, R600, and
XCore currently don't leverage this functionality, but its trivial for
them to add it now.

llvm-svn: 227735

llvm/include/llvm/Target/TargetMachine.h

@@ -191,16 +191,10 @@ public:
   /// \brief Get a \c TargetIRAnalysis appropriate for the target.
   ///
   /// This is used to construct the new pass manager's target IR analysis pass,
-  /// set up appropriately for this target machine.
+  /// set up appropriately for this target machine. Even the old pass manager
+  /// uses this to answer queries about the IR.
   virtual TargetIRAnalysis getTargetIRAnalysis();
 
-  /// \brief Get a TTI implementation for the target.
-  ///
-  /// Targets should override this method to provide target-accurate
-  /// information to the mid-level optimizer. If left with the baseline only
-  /// a very conservative set of heuristics will be used.
-  virtual TargetTransformInfo getTTI();
-
   /// CodeGenFileType - These enums are meant to be passed into
   /// addPassesToEmitFile to indicate what type of file to emit, and returned by
   /// it to indicate what type of file could actually be made.
@@ -252,12 +246,11 @@ protected: // Can only create subclasses.
 
   void initAsmInfo();
 public:
-  /// \brief Get a TTI implementation for the target.
+  /// \brief Get a TargetIRAnalysis implementation for the target.
   ///
-  /// This uses the common code generator to produce a TTI implementation.
-  /// Targets may override it to provide more customized TTI implementation
-  /// instead.
-  TargetTransformInfo getTTI() override;
+  /// This analysis will produce a TTI result which uses the common code
+  /// generator to answer queries about the IR.
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
   /// createPassConfig - Create a pass configuration object to be used by
   /// addPassToEmitX methods for generating a pipeline of CodeGen passes.

llvm/lib/CodeGen/LLVMTargetMachine.cpp

@@ -78,8 +78,9 @@ LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
   CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
 }
 
-TargetTransformInfo LLVMTargetMachine::getTTI() {
-  return TargetTransformInfo(BasicTTIImpl(this));
+TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis(
+      [this](Function &) { return TargetTransformInfo(BasicTTIImpl(this)); });
 }
 
 /// addPassesToX helper drives creation and initialization of TargetPassConfig.

llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

@@ -196,8 +196,10 @@ public:
 };
 } // namespace
 
-TargetTransformInfo AArch64TargetMachine::getTTI() {
-  return TargetTransformInfo(AArch64TTIImpl(this));
+TargetIRAnalysis AArch64TargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis([this](Function &F) {
+    return TargetTransformInfo(AArch64TTIImpl(this, F));
+  });
 }
 
 TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) {

llvm/lib/Target/AArch64/AArch64TargetMachine.h

@@ -45,8 +45,8 @@ public:
   // Pass Pipeline Configuration
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
 
-  /// \brief Register AArch64 analysis passes with a pass manager.
-  TargetTransformInfo getTTI() override;
+  /// \brief Get the TargetIRAnalysis for this target.
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
   TargetLoweringObjectFile* getObjFileLowering() const override {
     return TLOF.get();

llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h

@@ -44,8 +44,8 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
   };
 
 public:
-  explicit AArch64TTIImpl(const AArch64TargetMachine *TM)
-      : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
+  explicit AArch64TTIImpl(const AArch64TargetMachine *TM, Function &F)
+      : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
 
   // Provide value semantics. MSVC requires that we spell all of these out.
   AArch64TTIImpl(const AArch64TTIImpl &Arg)

llvm/lib/Target/ARM/ARMTargetMachine.cpp

@@ -216,8 +216,9 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
   return I.get();
 }
 
-TargetTransformInfo ARMBaseTargetMachine::getTTI() {
-  return TargetTransformInfo(ARMTTIImpl(this));
+TargetIRAnalysis ARMBaseTargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis(
+      [this](Function &F) { return TargetTransformInfo(ARMTTIImpl(this, F)); });
 }
 
 

llvm/lib/Target/ARM/ARMTargetMachine.h

@@ -49,8 +49,8 @@ public:
   const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
   const DataLayout *getDataLayout() const override { return &DL; }
 
-  /// \brief Register ARM analysis passes with a pass manager.
-  TargetTransformInfo getTTI() override;
+  /// \brief Get the TargetIRAnalysis for this target.
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
   // Pass Pipeline Configuration
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

llvm/lib/Target/ARM/ARMTargetTransformInfo.h

@@ -37,8 +37,8 @@ class ARMTTIImpl : public BasicTTIImplBase<ARMTTIImpl> {
   unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
 
 public:
-  explicit ARMTTIImpl(const ARMBaseTargetMachine *TM)
-      : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
+  explicit ARMTTIImpl(const ARMBaseTargetMachine *TM, Function &F)
+      : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
 
   // Provide value semantics. MSVC requires that we spell all of these out.
   ARMTTIImpl(const ARMTTIImpl &Arg)

llvm/lib/Target/Mips/MipsTargetMachine.cpp

@@ -238,18 +238,17 @@ void MipsPassConfig::addPreRegAlloc() {
     addPass(createMipsOptimizePICCallPass(getMipsTargetMachine()));
 }
 
-TargetTransformInfo MipsTargetMachine::getTTI() {
+TargetIRAnalysis MipsTargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis([this](Function &F) {
     if (Subtarget->allowMixed16_32()) {
       DEBUG(errs() << "No Target Transform Info Pass Added\n");
-    //FIXME: The Basic Target Transform Info
-    // pass needs to become a function pass instead of
-    // being an immutable pass and then this method as it exists now
-    // would be unnecessary.
+      // FIXME: This is no longer necessary as the TTI returned is per-function.
       return TargetTransformInfo(getDataLayout());
     }
 
     DEBUG(errs() << "Target Transform Info Pass Added\n");
-  return LLVMTargetMachine::getTTI();
+    return TargetTransformInfo(BasicTTIImpl(this));
+  });
 }
 
 // Implemented by targets that want to run passes immediately before

llvm/lib/Target/Mips/MipsTargetMachine.h

@@ -15,6 +15,7 @@
 #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
 
 #include "MipsSubtarget.h"
+#include "llvm/CodeGen/BasicTTIImpl.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetFrameLowering.h"
@@ -44,7 +45,7 @@ public:
                     CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
   ~MipsTargetMachine() override;
 
-  TargetTransformInfo getTTI() override;
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
   const DataLayout *getDataLayout() const override { return &DL; }
   const MipsSubtarget *getSubtargetImpl() const override {

llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp

@@ -137,8 +137,9 @@ TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) {
   return PassConfig;
 }
 
-TargetTransformInfo NVPTXTargetMachine::getTTI() {
-  return TargetTransformInfo(NVPTXTTIImpl(this));
+TargetIRAnalysis NVPTXTargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis(
+      [this](Function &) { return TargetTransformInfo(NVPTXTTIImpl(this)); });
 }
 
 void NVPTXPassConfig::addIRPasses() {

llvm/lib/Target/NVPTX/NVPTXTargetMachine.h

@@ -56,7 +56,7 @@ public:
     return TLOF.get();
   }
 
-  TargetTransformInfo getTTI() override;
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
 }; // NVPTXTargetMachine.
 

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

@@ -275,6 +275,7 @@ void PPCPassConfig::addPreEmitPass() {
   addPass(createPPCBranchSelectionPass(), false);
 }
 
-TargetTransformInfo PPCTargetMachine::getTTI() {
-  return TargetTransformInfo(PPCTTIImpl(this));
+TargetIRAnalysis PPCTargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis(
+      [this](Function &F) { return TargetTransformInfo(PPCTTIImpl(this, F)); });
 }

llvm/lib/Target/PowerPC/PPCTargetMachine.h

@@ -45,7 +45,7 @@ public:
   // Pass Pipeline Configuration
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
 
-  TargetTransformInfo getTTI() override;
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
   TargetLoweringObjectFile *getObjFileLowering() const override {
     return TLOF.get();

llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h

@@ -33,8 +33,8 @@ class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
   const PPCTargetLowering *TLI;
 
 public:
-  explicit PPCTTIImpl(const PPCTargetMachine *TM)
-      : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
+  explicit PPCTTIImpl(const PPCTargetMachine *TM, Function &F)
+      : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
 
   // Provide value semantics. MSVC requires that we spell all of these out.
   PPCTTIImpl(const PPCTTIImpl &Arg)

llvm/lib/Target/R600/AMDGPUTargetMachine.cpp

@@ -120,8 +120,9 @@ TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) {
 // AMDGPU Pass Setup
 //===----------------------------------------------------------------------===//
 
-TargetTransformInfo AMDGPUTargetMachine::getTTI() {
-  return TargetTransformInfo(AMDGPUTTIImpl(this));
+TargetIRAnalysis AMDGPUTargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis(
+      [this](Function &F) { return TargetTransformInfo(AMDGPUTTIImpl(this)); });
 }
 
 void AMDGPUPassConfig::addIRPasses() {

llvm/lib/Target/R600/AMDGPUTargetMachine.h

@@ -55,7 +55,7 @@ public:
   }
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
 
-  TargetTransformInfo getTTI() override;
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
   TargetLoweringObjectFile *getObjFileLowering() const override {
     return TLOF;

llvm/lib/Target/TargetMachine.cpp

@@ -173,14 +173,8 @@ void TargetMachine::setDataSections(bool V) {
 }
 
 TargetIRAnalysis TargetMachine::getTargetIRAnalysis() {
-  // While targets are free to just override getTTI and rely on this analysis,
-  // it would be more efficient to override and provide an analysis that could
-  // directly construct that target's TTI without the virtual call.
-  return TargetIRAnalysis([this](Function &) { return getTTI(); });
-}
-
-TargetTransformInfo TargetMachine::getTTI() {
-  return TargetTransformInfo(getDataLayout());
+  return TargetIRAnalysis(
+      [this](Function &) { return TargetTransformInfo(getDataLayout()); });
 }
 
 static bool canUsePrivateLabel(const MCAsmInfo &AsmInfo,

llvm/lib/Target/X86/X86TargetMachine.cpp

@@ -165,8 +165,9 @@ UseVZeroUpper("x86-use-vzeroupper", cl::Hidden,
 // X86 TTI query.
 //===----------------------------------------------------------------------===//
 
-TargetTransformInfo X86TargetMachine::getTTI() {
-  return TargetTransformInfo(X86TTIImpl(this));
+TargetIRAnalysis X86TargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis(
+      [this](Function &F) { return TargetTransformInfo(X86TTIImpl(this, F)); });
 }
 
 

llvm/lib/Target/X86/X86TargetMachine.h

@@ -39,7 +39,7 @@ public:
   const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
   const X86Subtarget *getSubtargetImpl(const Function &F) const override;
 
-  TargetTransformInfo getTTI() override;
+  TargetIRAnalysis getTargetIRAnalysis() override;
 
   // Set up the pass pipeline.
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

llvm/lib/Target/X86/X86TargetTransformInfo.h

@@ -35,8 +35,8 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
   unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
 
 public:
-  explicit X86TTIImpl(const X86TargetMachine *TM)
-      : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
+  explicit X86TTIImpl(const X86TargetMachine *TM, Function &F)
+      : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
 
   // Provide value semantics. MSVC requires that we spell all of these out.
   X86TTIImpl(const X86TTIImpl &Arg)

llvm/lib/Target/XCore/XCoreTargetMachine.cpp

@@ -83,6 +83,7 @@ extern "C" void LLVMInitializeXCoreTarget() {
   RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
 }
 
-TargetTransformInfo XCoreTargetMachine::getTTI() {
-  return TargetTransformInfo(XCoreTTIImpl(this));
+TargetIRAnalysis XCoreTargetMachine::getTargetIRAnalysis() {
+  return TargetIRAnalysis(
+      [this](Function &) { return TargetTransformInfo(XCoreTTIImpl(this)); });
 }

llvm/lib/Target/XCore/XCoreTargetMachine.h

@@ -36,7 +36,7 @@ public:
   // Pass Pipeline Configuration
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
 
-  TargetTransformInfo getTTI() override;
+  TargetIRAnalysis getTargetIRAnalysis() override;
   TargetLoweringObjectFile *getObjFileLowering() const override {
     return TLOF.get();
   }