forked from OSchip/llvm-project
Simplify this code; switch lowering shouldn't produce cases
which trivially fold away. llvm-svn: 106765
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@ -1424,18 +1424,10 @@ void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB,
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MVT::Other, getControlRoot(), Cond,
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DAG.getBasicBlock(CB.TrueBB));
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// If the branch was constant folded, fix up the CFG.
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if (BrCond.getOpcode() == ISD::BR) {
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SwitchBB->removeSuccessor(CB.FalseBB);
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} else {
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// Otherwise, go ahead and insert the false branch.
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if (BrCond == getControlRoot())
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SwitchBB->removeSuccessor(CB.TrueBB);
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if (CB.FalseBB != NextBlock)
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BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
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DAG.getBasicBlock(CB.FalseBB));
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}
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// Insert the false branch.
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if (CB.FalseBB != NextBlock)
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BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
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DAG.getBasicBlock(CB.FalseBB));
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DAG.setRoot(BrCond);
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}
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