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[x86] add tests for basic logic op folds 

llvm-svn: 285520
This commit is contained in:
Sanjay Patel 2016-10-30 18:04:19 +00:00
parent d343697f1e
commit 8a5f9810a0
2 changed files with 37 additions and 0 deletions
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19
llvm/test/CodeGen/X86/combine-and.ll
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@ -1,6 +1,25 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s
define i32 @and_self(i32 %x) {
; CHECK-LABEL: and_self:
; CHECK: # BB#0:
; CHECK-NEXT: andl %edi, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
%and = and i32 %x, %x
ret i32 %and
}
define <4 x i32> @and_self_vec(<4 x i32> %x) {
; CHECK-LABEL: and_self_vec:
; CHECK: # BB#0:
; CHECK-NEXT: andps %xmm0, %xmm0
; CHECK-NEXT: retq
%and = and <4 x i32> %x, %x
ret <4 x i32> %and
}
;
; Verify that the DAGCombiner is able to fold a vector AND into a blend
; if one of the operands to the AND is a vector of all constants, and each

18
llvm/test/CodeGen/X86/combine-or.ll
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@ -1,6 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
define i32 @or_self(i32 %x) {
; CHECK-LABEL: or_self:
; CHECK: # BB#0:
; CHECK-NEXT: orl %edi, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
%or = or i32 %x, %x
ret i32 %or
}
define <4 x i32> @or_self_vec(<4 x i32> %x) {
; CHECK-LABEL: or_self_vec:
; CHECK: # BB#0:
; CHECK-NEXT: orps %xmm0, %xmm0
; CHECK-NEXT: retq
%or = or <4 x i32> %x, %x
ret <4 x i32> %or
}
; Verify that each of the following test cases is folded into a single
; instruction which performs a blend operation.