forked from OSchip/llvm-project
parent
39eff98d38
commit
8a2bf3099f
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@ -1,116 +1,129 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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define i32 @test1(i32 %x) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i32 %x
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;
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%and = and i32 %x, 1
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%cmp = icmp eq i32 %and, 0
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%and1 = and i32 %x, -2
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%and1.x = select i1 %cmp, i32 %and1, i32 %x
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ret i32 %and1.x
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; CHECK-LABEL: @test1(
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; CHECK: ret i32 %x
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}
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define i32 @test2(i32 %x) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: ret i32 %x
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;
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%and = and i32 %x, 1
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%cmp = icmp ne i32 %and, 0
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%and1 = and i32 %x, -2
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%and1.x = select i1 %cmp, i32 %x, i32 %and1
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ret i32 %and1.x
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; CHECK-LABEL: @test2(
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; CHECK: ret i32 %x
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}
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define i32 @test3(i32 %x) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -2
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; CHECK-NEXT: ret i32 [[AND1]]
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;
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%and = and i32 %x, 1
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%cmp = icmp ne i32 %and, 0
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%and1 = and i32 %x, -2
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%and1.x = select i1 %cmp, i32 %and1, i32 %x
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ret i32 %and1.x
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; CHECK-LABEL: @test3(
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; CHECK: %[[and:.*]] = and i32 %x, -2
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; CHECK: ret i32 %[[and]]
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}
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define i32 @test4(i32 %X) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[OR:%.*]] = or i32 %X, -2147483648
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; CHECK-NEXT: ret i32 [[OR]]
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;
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%cmp = icmp slt i32 %X, 0
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%or = or i32 %X, -2147483648
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%cond = select i1 %cmp, i32 %X, i32 %or
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ret i32 %cond
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; CHECK-LABEL: @test4
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; CHECK: %[[or:.*]] = or i32 %X, -2147483648
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; CHECK: ret i32 %[[or]]
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}
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define i32 @test5(i32 %X) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret i32 %X
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;
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%cmp = icmp slt i32 %X, 0
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%or = or i32 %X, -2147483648
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%cond = select i1 %cmp, i32 %or, i32 %X
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ret i32 %cond
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; CHECK-LABEL: @test5
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; CHECK: ret i32 %X
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}
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define i32 @test6(i32 %X) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[AND:%.*]] = and i32 %X, 2147483647
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%cmp = icmp slt i32 %X, 0
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%and = and i32 %X, 2147483647
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%cond = select i1 %cmp, i32 %and, i32 %X
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ret i32 %cond
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; CHECK-LABEL: @test6
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; CHECK: %[[and:.*]] = and i32 %X, 2147483647
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; CHECK: ret i32 %[[and]]
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}
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define i32 @test7(i32 %X) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: ret i32 %X
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;
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%cmp = icmp slt i32 %X, 0
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%and = and i32 %X, 2147483647
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%cond = select i1 %cmp, i32 %X, i32 %and
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ret i32 %cond
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; CHECK-LABEL: @test7
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; CHECK: ret i32 %X
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}
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define i32 @test8(i32 %X) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: ret i32 %X
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;
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%cmp = icmp sgt i32 %X, -1
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%or = or i32 %X, -2147483648
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%cond = select i1 %cmp, i32 %X, i32 %or
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ret i32 %cond
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; CHECK-LABEL: @test8
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; CHECK: ret i32 %X
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}
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define i32 @test9(i32 %X) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[OR:%.*]] = or i32 %X, -2147483648
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; CHECK-NEXT: ret i32 [[OR]]
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;
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%cmp = icmp sgt i32 %X, -1
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%or = or i32 %X, -2147483648
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%cond = select i1 %cmp, i32 %or, i32 %X
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ret i32 %cond
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; CHECK-LABEL: @test9
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; CHECK: %[[or:.*]] = or i32 %X, -2147483648
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; CHECK: ret i32 %[[or]]
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}
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define i32 @test10(i32 %X) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: ret i32 %X
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;
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%cmp = icmp sgt i32 %X, -1
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%and = and i32 %X, 2147483647
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%cond = select i1 %cmp, i32 %and, i32 %X
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ret i32 %cond
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; CHECK-LABEL: @test10
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; CHECK: ret i32 %X
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}
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define i32 @test11(i32 %X) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[AND:%.*]] = and i32 %X, 2147483647
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%cmp = icmp sgt i32 %X, -1
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%and = and i32 %X, 2147483647
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%cond = select i1 %cmp, i32 %X, i32 %and
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ret i32 %cond
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; CHECK-LABEL: @test11
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; CHECK: %[[and:.*]] = and i32 %X, 2147483647
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; CHECK: ret i32 %[[and]]
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}
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; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8(
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; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8
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; CHECK-NEXT: ret i32 [[OR]]
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define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
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; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8(
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; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 8
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; CHECK-NEXT: ret i32 [[OR]]
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;
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%or = or i32 %x, 8
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@ -118,10 +131,11 @@ define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
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ret i32 %or.x
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}
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; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9
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; CHECK-NEXT: ret i32 [[AND]]
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define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
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; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
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; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
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; CHECK-NEXT: ret i32 [[AND1]]
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;
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i32 %x, -9
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@ -129,9 +143,10 @@ define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
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ret i32 %x.and1
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}
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; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
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; CHECK-NEXT: ret i32 %x
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define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
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; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
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; CHECK-NEXT: ret i32 %x
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;
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i32 %x, -9
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@ -139,9 +154,14 @@ define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
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ret i32 %and1.x
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}
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; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8(
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; CHECK: select i1 %cmp, i64 %y, i64 %and1
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define i64 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i64 %y) {
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; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8(
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; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 8
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
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; CHECK-NEXT: [[AND1:%.*]] = and i64 %y, -9
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; CHECK-NEXT: [[Y_AND1:%.*]] = select i1 [[CMP]], i64 %y, i64 [[AND1]]
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; CHECK-NEXT: ret i64 [[Y_AND1]]
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;
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i64 %y, -9
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ret i64 %y.and1
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}
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; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8(
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; CHECK: select i1 %cmp, i64 %and1, i64 %y
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define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) {
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; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8(
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; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 8
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
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; CHECK-NEXT: [[AND1:%.*]] = and i64 %y, -9
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; CHECK-NEXT: [[AND1_Y:%.*]] = select i1 [[CMP]], i64 [[AND1]], i64 %y
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; CHECK-NEXT: ret i64 [[AND1_Y]]
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;
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i64 %y, -9
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