forked from OSchip/llvm-project
[CostModel][X86] Add SLM/GLM/BtVer2 compare + division/remainder cost tests
llvm-svn: 330435
This commit is contained in:
Simon Pilgrim
parent
f79d15e432
commit
8a15d72550
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@ -8,6 +8,10 @@
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
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;
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=btver2 | FileCheck %s --check-prefixes=BTVER2
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define i32 @cmp_float(i32 %arg) {
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define i32 @cmp_float(i32 %arg) {
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; SSE2-LABEL: 'cmp_float'
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; SSE2-LABEL: 'cmp_float'
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@ -86,6 +90,17 @@ define i32 @cmp_float(i32 %arg) {
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; BTVER2-LABEL: 'cmp_float'
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp olt <2 x float> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp olt <4 x float> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fcmp olt <8 x float> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fcmp olt <16 x float> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp olt <2 x double> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fcmp olt <4 x double> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fcmp olt <8 x double> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F64 = fcmp olt <16 x double> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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;
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%V2F32 = fcmp olt <2 x float> undef, undef
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%V2F32 = fcmp olt <2 x float> undef, undef
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%V4F32 = fcmp olt <4 x float> undef, undef
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%V4F32 = fcmp olt <4 x float> undef, undef
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@ -271,6 +286,25 @@ define i32 @cmp_int(i32 %arg) {
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; BTVER2-LABEL: 'cmp_int'
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I8 = icmp eq <32 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I8 = icmp eq <64 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V128I8 = icmp eq <128 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I16 = icmp eq <16 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32I16 = icmp eq <32 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V64I16 = icmp eq <64 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = icmp eq <4 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I32 = icmp eq <8 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16I32 = icmp eq <16 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32I32 = icmp eq <32 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = icmp eq <2 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = icmp eq <4 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = icmp eq <8 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16I64 = icmp eq <16 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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;
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%V16I8 = icmp eq <16 x i8> undef, undef
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%V16I8 = icmp eq <16 x i8> undef, undef
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%V32I8 = icmp eq <32 x i8> undef, undef
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%V32I8 = icmp eq <32 x i8> undef, undef
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@ -6,6 +6,10 @@
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
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;
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
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; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=btver2 | FileCheck %s --check-prefixes=BTVER2
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define i32 @sdiv() {
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define i32 @sdiv() {
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; CHECK-LABEL: 'sdiv'
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; CHECK-LABEL: 'sdiv'
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@ -26,6 +30,25 @@ define i32 @sdiv() {
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; CHECK-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; BTVER2-LABEL: 'sdiv'
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sdiv i64 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = sdiv <2 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = sdiv <4 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = sdiv <8 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sdiv i32 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i32 = sdiv <4 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i32 = sdiv <8 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i32 = sdiv <16 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i16 = sdiv <8 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i16 = sdiv <16 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i16 = sdiv <32 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sdiv i8 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i8 = sdiv <16 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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;
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%I64 = sdiv i64 undef, undef
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%I64 = sdiv i64 undef, undef
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%V2i64 = sdiv <2 x i64> undef, undef
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%V2i64 = sdiv <2 x i64> undef, undef
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@ -69,6 +92,25 @@ define i32 @udiv() {
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; CHECK-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; BTVER2-LABEL: 'udiv'
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = udiv i64 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = udiv <2 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = udiv <4 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = udiv <8 x i64> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = udiv i32 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i32 = udiv <4 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i32 = udiv <8 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i32 = udiv <16 x i32> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i16 = udiv <8 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i16 = udiv <16 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i16 = udiv <32 x i16> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = udiv i8 undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i8 = udiv <16 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, undef
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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;
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%I64 = udiv i64 undef, undef
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%I64 = udiv i64 undef, undef
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%V2i64 = udiv <2 x i64> undef, undef
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%V2i64 = udiv <2 x i64> undef, undef
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@ -226,6 +268,25 @@ define i32 @sdiv_uniformconst() {
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; BTVER2-LABEL: 'sdiv_uniformconst'
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sdiv i64 undef, 7
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = sdiv <2 x i64> undef, <i64 7, i64 7>
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = sdiv <4 x i64> undef, <i64 7, i64 7, i64 7, i64 7>
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = sdiv <8 x i64> undef, <i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7>
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sdiv i32 undef, 7
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4i32 = sdiv <4 x i32> undef, <i32 7, i32 7, i32 7, i32 7>
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8i32 = sdiv <8 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16i32 = sdiv <16 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, 7
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8i16 = sdiv <8 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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; BTVER2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V16i16 = sdiv <16 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V32i16 = sdiv <32 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sdiv i8 undef, 7
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i8 = sdiv <16 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
;
|
;
|
||||||
%I64 = sdiv i64 undef, 7
|
%I64 = sdiv i64 undef, 7
|
||||||
%V2i64 = sdiv <2 x i64> undef, <i64 7, i64 7>
|
%V2i64 = sdiv <2 x i64> undef, <i64 7, i64 7>
|
||||||
|
|
@ -345,6 +406,25 @@ define i32 @udiv_uniformconst() {
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
|
;
|
||||||
|
; BTVER2-LABEL: 'udiv_uniformconst'
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = udiv i64 undef, 7
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = udiv <2 x i64> undef, <i64 7, i64 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = udiv <4 x i64> undef, <i64 7, i64 7, i64 7, i64 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = udiv <8 x i64> undef, <i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = udiv i32 undef, 7
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4i32 = udiv <4 x i32> undef, <i32 7, i32 7, i32 7, i32 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8i32 = udiv <8 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16i32 = udiv <16 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, 7
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8i16 = udiv <8 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V16i16 = udiv <16 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V32i16 = udiv <32 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = udiv i8 undef, 7
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i8 = udiv <16 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
;
|
;
|
||||||
%I64 = udiv i64 undef, 7
|
%I64 = udiv i64 undef, 7
|
||||||
%V2i64 = udiv <2 x i64> undef, <i64 7, i64 7>
|
%V2i64 = udiv <2 x i64> undef, <i64 7, i64 7>
|
||||||
|
|
@ -502,6 +582,25 @@ define i32 @sdiv_uniformconstpow2() {
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
|
;
|
||||||
|
; BTVER2-LABEL: 'sdiv_uniformconstpow2'
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sdiv i64 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = sdiv <2 x i64> undef, <i64 16, i64 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = sdiv <4 x i64> undef, <i64 16, i64 16, i64 16, i64 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = sdiv <8 x i64> undef, <i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sdiv i32 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4i32 = sdiv <4 x i32> undef, <i32 16, i32 16, i32 16, i32 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8i32 = sdiv <8 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16i32 = sdiv <16 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8i16 = sdiv <8 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V16i16 = sdiv <16 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V32i16 = sdiv <32 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sdiv i8 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i8 = sdiv <16 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = sdiv <32 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = sdiv <64 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
;
|
;
|
||||||
%I64 = sdiv i64 undef, 16
|
%I64 = sdiv i64 undef, 16
|
||||||
%V2i64 = sdiv <2 x i64> undef, <i64 16, i64 16>
|
%V2i64 = sdiv <2 x i64> undef, <i64 16, i64 16>
|
||||||
|
|
@ -621,6 +720,25 @@ define i32 @udiv_uniformconstpow2() {
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
|
;
|
||||||
|
; BTVER2-LABEL: 'udiv_uniformconstpow2'
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = udiv i64 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = udiv <2 x i64> undef, <i64 16, i64 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = udiv <4 x i64> undef, <i64 16, i64 16, i64 16, i64 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = udiv <8 x i64> undef, <i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16, i64 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = udiv i32 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4i32 = udiv <4 x i32> undef, <i32 16, i32 16, i32 16, i32 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8i32 = udiv <8 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V16i32 = udiv <16 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8i16 = udiv <8 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V16i16 = udiv <16 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V32i16 = udiv <32 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = udiv i8 undef, 16
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i8 = udiv <16 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V32i8 = udiv <32 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V64i8 = udiv <64 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
;
|
;
|
||||||
%I64 = udiv i64 undef, 16
|
%I64 = udiv i64 undef, 16
|
||||||
%V2i64 = udiv <2 x i64> undef, <i64 16, i64 16>
|
%V2i64 = udiv <2 x i64> undef, <i64 16, i64 16>
|
||||||
|
|
|
||||||
|
|
@ -6,6 +6,10 @@
|
||||||
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
|
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
|
||||||
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
|
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
|
||||||
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
|
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
|
||||||
|
;
|
||||||
|
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
|
||||||
|
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
|
||||||
|
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=btver2 | FileCheck %s --check-prefixes=BTVER2
|
||||||
|
|
||||||
define i32 @srem() {
|
define i32 @srem() {
|
||||||
; CHECK-LABEL: 'srem'
|
; CHECK-LABEL: 'srem'
|
||||||
|
|
@ -26,6 +30,25 @@ define i32 @srem() {
|
||||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = srem <32 x i8> undef, undef
|
; CHECK-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = srem <32 x i8> undef, undef
|
||||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = srem <64 x i8> undef, undef
|
; CHECK-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = srem <64 x i8> undef, undef
|
||||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
|
;
|
||||||
|
; BTVER2-LABEL: 'srem'
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = srem i64 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2i64 = srem <2 x i64> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i64 = srem <4 x i64> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i64 = srem <8 x i64> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = srem i32 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i32 = srem <4 x i32> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i32 = srem <8 x i32> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i32 = srem <16 x i32> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = srem i16 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i16 = srem <8 x i16> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i16 = srem <16 x i16> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i16 = srem <32 x i16> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = srem i8 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i8 = srem <16 x i8> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = srem <32 x i8> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = srem <64 x i8> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
;
|
;
|
||||||
%I64 = srem i64 undef, undef
|
%I64 = srem i64 undef, undef
|
||||||
%V2i64 = srem <2 x i64> undef, undef
|
%V2i64 = srem <2 x i64> undef, undef
|
||||||
|
|
@ -69,6 +92,25 @@ define i32 @urem() {
|
||||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = urem <32 x i8> undef, undef
|
; CHECK-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = urem <32 x i8> undef, undef
|
||||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = urem <64 x i8> undef, undef
|
; CHECK-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = urem <64 x i8> undef, undef
|
||||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
|
;
|
||||||
|
; BTVER2-LABEL: 'urem'
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = urem i64 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2i64 = urem <2 x i64> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i64 = urem <4 x i64> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i64 = urem <8 x i64> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = urem i32 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i32 = urem <4 x i32> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i32 = urem <8 x i32> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i32 = urem <16 x i32> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = urem i16 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i16 = urem <8 x i16> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i16 = urem <16 x i16> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i16 = urem <32 x i16> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = urem i8 undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i8 = urem <16 x i8> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = urem <32 x i8> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = urem <64 x i8> undef, undef
|
||||||
|
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||||
;
|
;
|
||||||
%I64 = urem i64 undef, undef
|
%I64 = urem i64 undef, undef
|
||||||
%V2i64 = urem <2 x i64> undef, undef
|
%V2i64 = urem <2 x i64> undef, undef
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue