forked from OSchip/llvm-project
[DAGCombiner] refactor folds for fadd (fmul X, -2.0), Y; NFCI
The transform doesn't work if the vector constant has undef elements. llvm-svn: 344532
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@ -10851,14 +10851,6 @@ SDValue DAGCombiner::visitFMULForFMADistributiveCombine(SDNode *N) {
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return SDValue();
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}
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static bool isFMulNegTwo(SDValue &N) {
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if (N.getOpcode() != ISD::FMUL)
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return false;
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if (ConstantFPSDNode *CFP = isConstOrConstSplatFP(N.getOperand(1)))
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return CFP->isExactlyValue(-2.0);
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return false;
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}
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SDValue DAGCombiner::visitFADD(SDNode *N) {
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SDValue N0 = N->getOperand(0);
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SDValue N1 = N->getOperand(1);
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@ -10903,14 +10895,24 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
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return DAG.getNode(ISD::FSUB, DL, VT, N1,
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GetNegatedExpression(N0, DAG, LegalOperations), Flags);
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// fold (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B))
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// fold (fadd (fmul B, -2.0), A) -> (fsub A, (fadd B, B))
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if ((isFMulNegTwo(N0) && N0.hasOneUse()) ||
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(isFMulNegTwo(N1) && N1.hasOneUse())) {
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bool N1IsFMul = isFMulNegTwo(N1);
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SDValue AddOp = N1IsFMul ? N1.getOperand(0) : N0.getOperand(0);
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SDValue Add = DAG.getNode(ISD::FADD, DL, VT, AddOp, AddOp, Flags);
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return DAG.getNode(ISD::FSUB, DL, VT, N1IsFMul ? N0 : N1, Add, Flags);
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auto isFMulNegTwo = [](SDValue FMul) {
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if (!FMul.hasOneUse() || FMul.getOpcode() != ISD::FMUL)
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return false;
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auto *C = isConstOrConstSplatFP(FMul.getOperand(1));
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return C && C->isExactlyValue(-2.0);
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};
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// fadd (fmul B, -2.0), A --> fsub A, (fadd B, B)
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if (isFMulNegTwo(N0)) {
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SDValue B = N0.getOperand(0);
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SDValue Add = DAG.getNode(ISD::FADD, DL, VT, B, B, Flags);
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return DAG.getNode(ISD::FSUB, DL, VT, N1, Add, Flags);
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}
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// fadd A, (fmul B, -2.0) --> fsub A, (fadd B, B)
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if (isFMulNegTwo(N1)) {
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SDValue B = N1.getOperand(0);
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SDValue Add = DAG.getNode(ISD::FADD, DL, VT, B, B, Flags);
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return DAG.getNode(ISD::FSUB, DL, VT, N0, Add, Flags);
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}
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// No FP constant should be created after legalization as Instruction
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