forked from OSchip/llvm-project
[X86] Fix vector-tzcnt-512 test to disable CDI while enabling BWI for one of the runs. Update check patterns accordingly.
llvm-svn: 266967
This commit is contained in:
parent
4c07b0f896
commit
89d7a76d88
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@ -46,15 +46,63 @@ define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
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}
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define <8 x i64> @testv8i64u(<8 x i64> %in) nounwind {
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; ALL-LABEL: testv8i64u:
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; ALL: ## BB#0:
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; ALL-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; ALL-NEXT: vpsubq %zmm0, %zmm1, %zmm1
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; ALL-NEXT: vpandq %zmm1, %zmm0, %zmm0
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; ALL-NEXT: vplzcntq %zmm0, %zmm0
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; ALL-NEXT: vpbroadcastq {{.*}}(%rip), %zmm1
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; ALL-NEXT: vpsubq %zmm0, %zmm1, %zmm0
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; ALL-NEXT: retq
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; AVX512CD-LABEL: testv8i64u:
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; AVX512CD: ## BB#0:
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; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; AVX512CD-NEXT: vpsubq %zmm0, %zmm1, %zmm1
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; AVX512CD-NEXT: vpandq %zmm1, %zmm0, %zmm0
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; AVX512CD-NEXT: vplzcntq %zmm0, %zmm0
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; AVX512CD-NEXT: vpbroadcastq {{.*}}(%rip), %zmm1
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; AVX512CD-NEXT: vpsubq %zmm0, %zmm1, %zmm0
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; AVX512CD-NEXT: retq
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;
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; AVX512CDBW-LABEL: testv8i64u:
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; AVX512CDBW: ## BB#0:
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; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; AVX512CDBW-NEXT: vpsubq %zmm0, %zmm1, %zmm1
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; AVX512CDBW-NEXT: vpandq %zmm1, %zmm0, %zmm0
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; AVX512CDBW-NEXT: vplzcntq %zmm0, %zmm0
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; AVX512CDBW-NEXT: vpbroadcastq {{.*}}(%rip), %zmm1
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; AVX512CDBW-NEXT: vpsubq %zmm0, %zmm1, %zmm0
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; AVX512CDBW-NEXT: retq
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;
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; AVX512BW-LABEL: testv8i64u:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm1
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; AVX512BW-NEXT: vpextrq $1, %xmm1, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm2
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; AVX512BW-NEXT: vmovq %xmm1, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm1
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; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2
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; AVX512BW-NEXT: vpextrq $1, %xmm2, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm3
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; AVX512BW-NEXT: vmovq %xmm2, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm2
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; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
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; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
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; AVX512BW-NEXT: vextracti32x4 $1, %zmm0, %xmm2
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; AVX512BW-NEXT: vpextrq $1, %xmm2, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm3
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; AVX512BW-NEXT: vmovq %xmm2, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm2
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; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
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; AVX512BW-NEXT: vpextrq $1, %xmm0, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm3
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; AVX512BW-NEXT: vmovq %xmm0, %rax
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; AVX512BW-NEXT: tzcntq %rax, %rax
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; AVX512BW-NEXT: vmovq %rax, %xmm0
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; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
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; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
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; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
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; AVX512BW-NEXT: retq
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%out = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %in, i1 -1)
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ret <8 x i64> %out
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}
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@ -122,15 +170,83 @@ define <16 x i32> @testv16i32(<16 x i32> %in) nounwind {
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}
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define <16 x i32> @testv16i32u(<16 x i32> %in) nounwind {
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; ALL-LABEL: testv16i32u:
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; ALL: ## BB#0:
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; ALL-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; ALL-NEXT: vpsubd %zmm0, %zmm1, %zmm1
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; ALL-NEXT: vpandd %zmm1, %zmm0, %zmm0
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; ALL-NEXT: vplzcntd %zmm0, %zmm0
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; ALL-NEXT: vpbroadcastd {{.*}}(%rip), %zmm1
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; ALL-NEXT: vpsubd %zmm0, %zmm1, %zmm0
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; ALL-NEXT: retq
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; AVX512CD-LABEL: testv16i32u:
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; AVX512CD: ## BB#0:
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; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; AVX512CD-NEXT: vpsubd %zmm0, %zmm1, %zmm1
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; AVX512CD-NEXT: vpandd %zmm1, %zmm0, %zmm0
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; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
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; AVX512CD-NEXT: vpbroadcastd {{.*}}(%rip), %zmm1
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; AVX512CD-NEXT: vpsubd %zmm0, %zmm1, %zmm0
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; AVX512CD-NEXT: retq
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;
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; AVX512CDBW-LABEL: testv16i32u:
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; AVX512CDBW: ## BB#0:
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; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; AVX512CDBW-NEXT: vpsubd %zmm0, %zmm1, %zmm1
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; AVX512CDBW-NEXT: vpandd %zmm1, %zmm0, %zmm0
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; AVX512CDBW-NEXT: vplzcntd %zmm0, %zmm0
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; AVX512CDBW-NEXT: vpbroadcastd {{.*}}(%rip), %zmm1
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; AVX512CDBW-NEXT: vpsubd %zmm0, %zmm1, %zmm0
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; AVX512CDBW-NEXT: retq
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;
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; AVX512BW-LABEL: testv16i32u:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm1
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; AVX512BW-NEXT: vpextrd $1, %xmm1, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vmovd %xmm1, %ecx
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; AVX512BW-NEXT: tzcntl %ecx, %ecx
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; AVX512BW-NEXT: vmovd %ecx, %xmm2
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; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2
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; AVX512BW-NEXT: vpextrd $2, %xmm1, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
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; AVX512BW-NEXT: vpextrd $3, %xmm1, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1
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; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2
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; AVX512BW-NEXT: vpextrd $1, %xmm2, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vmovd %xmm2, %ecx
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; AVX512BW-NEXT: tzcntl %ecx, %ecx
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; AVX512BW-NEXT: vmovd %ecx, %xmm3
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; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
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; AVX512BW-NEXT: vpextrd $2, %xmm2, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
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; AVX512BW-NEXT: vpextrd $3, %xmm2, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2
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; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
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; AVX512BW-NEXT: vextracti32x4 $1, %zmm0, %xmm2
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; AVX512BW-NEXT: vpextrd $1, %xmm2, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vmovd %xmm2, %ecx
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; AVX512BW-NEXT: tzcntl %ecx, %ecx
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; AVX512BW-NEXT: vmovd %ecx, %xmm3
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; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
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; AVX512BW-NEXT: vpextrd $2, %xmm2, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
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; AVX512BW-NEXT: vpextrd $3, %xmm2, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2
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; AVX512BW-NEXT: vpextrd $1, %xmm0, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vmovd %xmm0, %ecx
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; AVX512BW-NEXT: tzcntl %ecx, %ecx
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; AVX512BW-NEXT: vmovd %ecx, %xmm3
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; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
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; AVX512BW-NEXT: vpextrd $2, %xmm0, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
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; AVX512BW-NEXT: vpextrd $3, %xmm0, %eax
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; AVX512BW-NEXT: tzcntl %eax, %eax
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; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm3, %xmm0
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; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
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; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
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; AVX512BW-NEXT: retq
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%out = call <16 x i32> @llvm.cttz.v16i32(<16 x i32> %in, i1 -1)
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ret <16 x i32> %out
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}
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