From 89c919c20b5942c839091b9628d672a8efc541c7 Mon Sep 17 00:00:00 2001 From: Mikhail Dvoretckii Date: Tue, 10 Jul 2018 08:26:54 +0000 Subject: [PATCH] [X86] Fast-isel tests for lowered truncation intrinsics This patch adds fast-isel tests for the IR patterns produced for truncation intrinsics in rC336643. Differential Revision: https://reviews.llvm.org/D48822 llvm-svn: 336645 --- .../X86/avx512bwvl-intrinsics-fast-isel.ll | 13 +++ .../X86/avx512vl-intrinsics-fast-isel.ll | 102 ++++++++++++++++++ 2 files changed, 115 insertions(+) diff --git a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll index 3bbc66727975..effa39bb8f1f 100644 --- a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll +++ b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll @@ -733,6 +733,19 @@ define <4 x i64> @test_mm256_maskz_broadcastw_epi16(i16 %a0, <2 x i64> %a1) { ret <4 x i64> %res2 } +define <2 x i64> @test_mm_cvtepi16_epi8(<2 x i64> %__A) { +; CHECK-LABEL: test_mm_cvtepi16_epi8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14],zero,zero,zero,zero,zero,zero,zero,zero +; CHECK-NEXT: ret{{[l|q]}} +entry: + %0 = bitcast <2 x i64> %__A to <8 x i16> + %conv.i = trunc <8 x i16> %0 to <8 x i8> + %shuf.i = shufflevector <8 x i8> %conv.i, <8 x i8> zeroinitializer, <16 x i32> + %1 = bitcast <16 x i8> %shuf.i to <2 x i64> + ret <2 x i64> %1 +} + define <2 x i64> @test_mm256_cvtepi16_epi8(<4 x i64> %__A) { ; CHECK-LABEL: test_mm256_cvtepi16_epi8: ; CHECK: # %bb.0: # %entry diff --git a/llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll index 65a893b06747..6c1cfa8fc093 100644 --- a/llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll +++ b/llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll @@ -3141,6 +3141,68 @@ entry: ret <2 x i64> %tmp4 } +define <2 x i64> @test_mm_cvtepi32_epi8(<2 x i64> %__A) { +; CHECK-LABEL: test_mm_cvtepi32_epi8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; CHECK-NEXT: ret{{[l|q]}} +entry: + %0 = bitcast <2 x i64> %__A to <4 x i32> + %conv.i = trunc <4 x i32> %0 to <4 x i8> + %shuf.i = shufflevector <4 x i8> %conv.i, <4 x i8> zeroinitializer, <16 x i32> + %1 = bitcast <16 x i8> %shuf.i to <2 x i64> + ret <2 x i64> %1 +} + +define <2 x i64> @test_mm_cvtepi32_epi16(<2 x i64> %__A) { +; CHECK-LABEL: test_mm_cvtepi32_epi16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero +; CHECK-NEXT: ret{{[l|q]}} +entry: + %0 = bitcast <2 x i64> %__A to <4 x i32> + %conv.i = trunc <4 x i32> %0 to <4 x i16> + %shuf.i = shufflevector <4 x i16> %conv.i, <4 x i16> zeroinitializer, <8 x i32> + %1 = bitcast <8 x i16> %shuf.i to <2 x i64> + ret <2 x i64> %1 +} + +define <2 x i64> @test_mm_cvtepi64_epi8(<2 x i64> %__A) { +; CHECK-LABEL: test_mm_cvtepi64_epi8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; CHECK-NEXT: ret{{[l|q]}} +entry: + %conv.i = trunc <2 x i64> %__A to <2 x i8> + %shuf.i = shufflevector <2 x i8> %conv.i, <2 x i8> zeroinitializer, <16 x i32> + %0 = bitcast <16 x i8> %shuf.i to <2 x i64> + ret <2 x i64> %0 +} + +define <2 x i64> @test_mm_cvtepi64_epi16(<2 x i64> %__A) { +; CHECK-LABEL: test_mm_cvtepi64_epi16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; CHECK-NEXT: ret{{[l|q]}} +entry: + %conv.i = trunc <2 x i64> %__A to <2 x i16> + %shuf.i = shufflevector <2 x i16> %conv.i, <2 x i16> zeroinitializer, <8 x i32> + %0 = bitcast <8 x i16> %shuf.i to <2 x i64> + ret <2 x i64> %0 +} + +define <2 x i64> @test_mm_cvtepi64_epi32(<2 x i64> %__A) { +; CHECK-LABEL: test_mm_cvtepi64_epi32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero +; CHECK-NEXT: ret{{[l|q]}} +entry: + %conv.i = trunc <2 x i64> %__A to <2 x i32> + %shuf.i = shufflevector <2 x i32> %conv.i, <2 x i32> zeroinitializer, <4 x i32> + %0 = bitcast <4 x i32> %shuf.i to <2 x i64> + ret <2 x i64> %0 +} + define <2 x i64> @test_mm256_cvtepi32_epi16(<4 x i64> %__A) local_unnamed_addr #0 { ; CHECK-LABEL: test_mm256_cvtepi32_epi16: ; CHECK: # %bb.0: # %entry @@ -3260,6 +3322,46 @@ entry: ret <2 x i64> %2 } +define <2 x i64> @test_mm256_cvtepi64_epi8(<4 x i64> %__A) { +; CHECK-LABEL: test_mm256_cvtepi64_epi8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpmovqb %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} +entry: + %conv.i = trunc <4 x i64> %__A to <4 x i8> + %shuf.i = shufflevector <4 x i8> %conv.i, <4 x i8> zeroinitializer, <16 x i32> + %0 = bitcast <16 x i8> %shuf.i to <2 x i64> + ret <2 x i64> %0 +} + +define <2 x i64> @test_mm256_cvtepi64_epi16(<4 x i64> %__A) { +; CHECK-LABEL: test_mm256_cvtepi64_epi16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpmovqw %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} +entry: + %conv.i = trunc <4 x i64> %__A to <4 x i16> + %shuf.i = shufflevector <4 x i16> %conv.i, <4 x i16> zeroinitializer, <8 x i32> + %0 = bitcast <8 x i16> %shuf.i to <2 x i64> + ret <2 x i64> %0 +} + +define <2 x i64> @test_mm256_cvtepi32_epi8(<4 x i64> %__A) { +; CHECK-LABEL: test_mm256_cvtepi32_epi8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vpmovdb %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} +entry: + %0 = bitcast <4 x i64> %__A to <8 x i32> + %conv.i = trunc <8 x i32> %0 to <8 x i8> + %shuf.i = shufflevector <8 x i8> %conv.i, <8 x i8> zeroinitializer, <16 x i32> + %1 = bitcast <16 x i8> %shuf.i to <2 x i64> + ret <2 x i64> %1 +} + define <2 x i64> @test_mm_ternarylogic_epi32(<2 x i64> %__A, <2 x i64> %__B, <2 x i64> %__C) { ; CHECK-LABEL: test_mm_ternarylogic_epi32: ; CHECK: # %bb.0: # %entry