Revert "[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics"

This seems to have broken sanitizers, giving lots of

  Assertion `NumBits <= MAX_INT_BITS && "bitwidth too large"' failed.

failures across multiple targets (currently X86 and PowerPC). Reverting
until I have a chance to reproduce and debug.

This reverts commit 6e876f9ded.
This commit is contained in:
Jessica Clarke 2021-05-05 17:00:40 +01:00
parent 7c2ece523d
commit 897d7bceb9
8 changed files with 1088 additions and 1042 deletions

View File

@ -3065,6 +3065,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
break;
case ISD::SMULO:
case ISD::UMULO:
case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
if (Op.getResNo() != 1)
break;
// The boolean result conforms to getBooleanContents.
@ -3519,42 +3520,6 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
Known = KnownBits::smin(Known, Known2);
break;
}
case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
if (Op.getResNo() == 1) {
// The boolean result conforms to getBooleanContents.
// If we know the result of a setcc has the top bits zero, use this info.
// We know that we have an integer-based boolean since these operations
// are only available for integer.
if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
TargetLowering::ZeroOrOneBooleanContent &&
BitWidth > 1)
Known.Zero.setBitsFrom(1);
break;
}
LLVM_FALLTHROUGH;
case ISD::ATOMIC_CMP_SWAP:
case ISD::ATOMIC_SWAP:
case ISD::ATOMIC_LOAD_ADD:
case ISD::ATOMIC_LOAD_SUB:
case ISD::ATOMIC_LOAD_AND:
case ISD::ATOMIC_LOAD_CLR:
case ISD::ATOMIC_LOAD_OR:
case ISD::ATOMIC_LOAD_XOR:
case ISD::ATOMIC_LOAD_NAND:
case ISD::ATOMIC_LOAD_MIN:
case ISD::ATOMIC_LOAD_MAX:
case ISD::ATOMIC_LOAD_UMIN:
case ISD::ATOMIC_LOAD_UMAX:
case ISD::ATOMIC_LOAD: {
unsigned MemBits =
cast<AtomicSDNode>(Op)->getMemoryVT().getScalarSizeInBits();
// If we are looking at the loaded value.
if (Op.getResNo() == 0) {
if (TLI->getExtendForAtomicOps() == ISD::ZERO_EXTEND)
Known.Zero.setBitsFrom(MemBits);
}
break;
}
case ISD::FrameIndex:
case ISD::TargetFrameIndex:
TLI->computeKnownBitsForFrameIndex(cast<FrameIndexSDNode>(Op)->getIndex(),
@ -4135,31 +4100,6 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
assert(Tmp <= VTBits && "Failed to determine minimum sign bits");
return Tmp;
}
case ISD::ATOMIC_CMP_SWAP:
case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
case ISD::ATOMIC_SWAP:
case ISD::ATOMIC_LOAD_ADD:
case ISD::ATOMIC_LOAD_SUB:
case ISD::ATOMIC_LOAD_AND:
case ISD::ATOMIC_LOAD_CLR:
case ISD::ATOMIC_LOAD_OR:
case ISD::ATOMIC_LOAD_XOR:
case ISD::ATOMIC_LOAD_NAND:
case ISD::ATOMIC_LOAD_MIN:
case ISD::ATOMIC_LOAD_MAX:
case ISD::ATOMIC_LOAD_UMIN:
case ISD::ATOMIC_LOAD_UMAX:
case ISD::ATOMIC_LOAD: {
Tmp = cast<AtomicSDNode>(Op)->getMemoryVT().getScalarSizeInBits();
// If we are looking at the loaded value.
if (Op.getResNo() == 0) {
if (TLI->getExtendForAtomicOps() == ISD::SIGN_EXTEND)
return VTBits - Tmp + 1;
if (TLI->getExtendForAtomicOps() == ISD::ZERO_EXTEND)
return VTBits - Tmp;
}
break;
}
}
// If we are looking at the loaded value of the SDNode.

View File

@ -259,20 +259,26 @@ defm ATOMIC_LOAD32_U_I64 : AtomicLoad<I64, "i64.atomic.load32_u", 0x16>;
// therefore don't have the extension type field. So instead of matching that,
// we match the patterns that the type legalizer expands them to.
// We directly match zext patterns and select the zext atomic loads.
// i32 (zext (i8 (atomic_load_8))) gets legalized to
// i32 (and (i32 (atomic_load_8)), 255)
// These can be selected to a single zero-extending atomic load instruction.
def zext_aload_8_32 :
PatFrag<(ops node:$addr), (and (i32 (atomic_load_8 node:$addr)), 255)>;
def zext_aload_16_32 :
PatFrag<(ops node:$addr), (and (i32 (atomic_load_16 node:$addr)), 65535)>;
// Unlike regular loads, extension to i64 is handled differently than i32.
// i64 (zext (i8 (atomic_load_8))) gets legalized to
// i64 (and (i64 (anyext (i32 (atomic_load_8)))), 255)
// Extension to i32 is elided by SelectionDAG as our atomic loads are
// zero-extending.
def zext_aload_8_64 :
PatFrag<(ops node:$addr),
(i64 (zext (i32 (atomic_load_8 node:$addr))))>;
(and (i64 (anyext (i32 (atomic_load_8 node:$addr)))), 255)>;
def zext_aload_16_64 :
PatFrag<(ops node:$addr),
(i64 (zext (i32 (atomic_load_16 node:$addr))))>;
(and (i64 (anyext (i32 (atomic_load_16 node:$addr)))), 65535)>;
def zext_aload_32_64 :
PatFrag<(ops node:$addr),
(i64 (zext (i32 (atomic_load_32 node:$addr))))>;
(zext (i32 (atomic_load node:$addr)))>;
// We don't have single sext atomic load instructions. So for sext loads, we
// match bare subword loads (for 32-bit results) and anyext loads (for 64-bit
@ -284,6 +290,8 @@ def sext_aload_16_64 :
PatFrag<(ops node:$addr), (anyext (i32 (atomic_load_16 node:$addr)))>;
// Select zero-extending loads with no constant offset.
defm : LoadPatNoOffset<i32, zext_aload_8_32, "ATOMIC_LOAD8_U_I32">;
defm : LoadPatNoOffset<i32, zext_aload_16_32, "ATOMIC_LOAD16_U_I32">;
defm : LoadPatNoOffset<i64, zext_aload_8_64, "ATOMIC_LOAD8_U_I64">;
defm : LoadPatNoOffset<i64, zext_aload_16_64, "ATOMIC_LOAD16_U_I64">;
defm : LoadPatNoOffset<i64, zext_aload_32_64, "ATOMIC_LOAD32_U_I64">;
@ -296,6 +304,10 @@ defm : LoadPatNoOffset<i64, sext_aload_16_64, "ATOMIC_LOAD16_U_I64">;
// 32->64 sext load gets selected as i32.atomic.load, i64.extend_i32_s
// Zero-extending loads with constant offset
defm : LoadPatImmOff<i32, zext_aload_8_32, regPlusImm, "ATOMIC_LOAD8_U_I32">;
defm : LoadPatImmOff<i32, zext_aload_16_32, regPlusImm, "ATOMIC_LOAD16_U_I32">;
defm : LoadPatImmOff<i32, zext_aload_8_32, or_is_add, "ATOMIC_LOAD8_U_I32">;
defm : LoadPatImmOff<i32, zext_aload_16_32, or_is_add, "ATOMIC_LOAD16_U_I32">;
defm : LoadPatImmOff<i64, zext_aload_8_64, regPlusImm, "ATOMIC_LOAD8_U_I64">;
defm : LoadPatImmOff<i64, zext_aload_16_64, regPlusImm, "ATOMIC_LOAD16_U_I64">;
defm : LoadPatImmOff<i64, zext_aload_32_64, regPlusImm, "ATOMIC_LOAD32_U_I64">;
@ -315,6 +327,8 @@ defm : LoadPatImmOff<i64, sext_aload_16_64, or_is_add, "ATOMIC_LOAD16_U_I64">;
// No 32->64 patterns, just use i32.atomic.load and i64.extend_s/i64
// Extending loads with just a constant offset
defm : LoadPatOffsetOnly<i32, zext_aload_8_32, "ATOMIC_LOAD8_U_I32">;
defm : LoadPatOffsetOnly<i32, zext_aload_16_32, "ATOMIC_LOAD16_U_I32">;
defm : LoadPatOffsetOnly<i64, zext_aload_8_64, "ATOMIC_LOAD8_U_I64">;
defm : LoadPatOffsetOnly<i64, zext_aload_16_64, "ATOMIC_LOAD16_U_I64">;
defm : LoadPatOffsetOnly<i64, zext_aload_32_64, "ATOMIC_LOAD32_U_I64">;
@ -323,6 +337,8 @@ defm : LoadPatOffsetOnly<i32, atomic_load_16, "ATOMIC_LOAD16_U_I32">;
defm : LoadPatOffsetOnly<i64, sext_aload_8_64, "ATOMIC_LOAD8_U_I64">;
defm : LoadPatOffsetOnly<i64, sext_aload_16_64, "ATOMIC_LOAD16_U_I64">;
defm : LoadPatGlobalAddrOffOnly<i32, zext_aload_8_32, "ATOMIC_LOAD8_U_I32">;
defm : LoadPatGlobalAddrOffOnly<i32, zext_aload_16_32, "ATOMIC_LOAD16_U_I32">;
defm : LoadPatGlobalAddrOffOnly<i64, zext_aload_8_64, "ATOMIC_LOAD8_U_I64">;
defm : LoadPatGlobalAddrOffOnly<i64, zext_aload_16_64, "ATOMIC_LOAD16_U_I64">;
defm : LoadPatGlobalAddrOffOnly<i64, zext_aload_32_64, "ATOMIC_LOAD32_U_I64">;
@ -635,13 +651,22 @@ defm : BinRMWPattern<atomic_swap_32, atomic_swap_64,
// These are combined patterns of truncating store patterns and zero-extending
// load patterns above.
class zext_bin_rmw_8_32<PatFrag kind> :
PatFrag<(ops node:$addr, node:$val), (i32 (kind node:$addr, node:$val))>;
class zext_bin_rmw_16_32<PatFrag kind> : zext_bin_rmw_8_32<kind>;
PatFrag<(ops node:$addr, node:$val),
(and (i32 (kind node:$addr, node:$val)), 255)>;
class zext_bin_rmw_16_32<PatFrag kind> :
PatFrag<(ops node:$addr, node:$val),
(and (i32 (kind node:$addr, node:$val)), 65535)>;
class zext_bin_rmw_8_64<PatFrag kind> :
PatFrag<(ops node:$addr, node:$val),
(and (i64 (anyext (i32 (kind node:$addr,
(i32 (trunc (i64 node:$val))))))), 255)>;
class zext_bin_rmw_16_64<PatFrag kind> :
PatFrag<(ops node:$addr, node:$val),
(and (i64 (anyext (i32 (kind node:$addr,
(i32 (trunc (i64 node:$val))))))), 65535)>;
class zext_bin_rmw_32_64<PatFrag kind> :
PatFrag<(ops node:$addr, node:$val),
(zext (i32 (kind node:$addr, (i32 (trunc (i64 node:$val))))))>;
class zext_bin_rmw_16_64<PatFrag kind> : zext_bin_rmw_8_64<kind>;
class zext_bin_rmw_32_64<PatFrag kind> : zext_bin_rmw_8_64<kind>;
// Truncating & sign-extending binary RMW patterns.
// These are combined patterns of truncating store patterns and sign-extending
@ -862,8 +887,10 @@ defm : TerRMWPattern<atomic_cmp_swap_32, atomic_cmp_swap_64,
// additional nodes such as anyext or assertzext depending on operand types.
class zext_ter_rmw_8_32<PatFrag kind> :
PatFrag<(ops node:$addr, node:$exp, node:$new),
(i32 (kind node:$addr, node:$exp, node:$new))>;
class zext_ter_rmw_16_32<PatFrag kind> : zext_ter_rmw_8_32<kind>;
(and (i32 (kind node:$addr, node:$exp, node:$new)), 255)>;
class zext_ter_rmw_16_32<PatFrag kind> :
PatFrag<(ops node:$addr, node:$exp, node:$new),
(and (i32 (kind node:$addr, node:$exp, node:$new)), 65535)>;
class zext_ter_rmw_8_64<PatFrag kind> :
PatFrag<(ops node:$addr, node:$exp, node:$new),
(zext (i32 (assertzext (i32 (kind node:$addr,

File diff suppressed because it is too large Load Diff

View File

@ -23,7 +23,7 @@ define dso_local signext i16 @ld_0_int16_t_uint8_t(i64 %ptr) {
; CHECK-LABEL: ld_0_int16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
@ -37,7 +37,7 @@ define dso_local signext i16 @ld_align16_int16_t_uint8_t(i8* nocapture readonly
; CHECK-LABEL: ld_align16_int16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -52,7 +52,7 @@ define dso_local signext i16 @ld_align32_int16_t_uint8_t(i8* nocapture readonly
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int16_t_uint8_t:
@ -60,7 +60,7 @@ define dso_local signext i16 @ld_align32_int16_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -76,7 +76,7 @@ define dso_local signext i16 @ld_align64_int16_t_uint8_t(i8* nocapture readonly
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int16_t_uint8_t:
@ -85,7 +85,7 @@ define dso_local signext i16 @ld_align64_int16_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -99,7 +99,7 @@ define dso_local signext i16 @ld_reg_int16_t_uint8_t(i8* nocapture readonly %ptr
; CHECK-LABEL: ld_reg_int16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -114,7 +114,7 @@ define dso_local signext i16 @ld_or_int16_t_uint8_t(i64 %ptr, i8 zeroext %off) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -131,7 +131,7 @@ define dso_local signext i16 @ld_not_disjoint16_int16_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -147,7 +147,7 @@ define dso_local signext i16 @ld_disjoint_align16_int16_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -165,7 +165,7 @@ define dso_local signext i16 @ld_not_disjoint32_int16_t_uint8_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -183,7 +183,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint8_t:
@ -193,7 +193,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint8_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int16_t_uint8_t:
@ -203,7 +203,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint8_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -223,7 +223,7 @@ define dso_local signext i16 @ld_not_disjoint64_int16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int16_t_uint8_t:
@ -234,7 +234,7 @@ define dso_local signext i16 @ld_not_disjoint64_int16_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -252,7 +252,7 @@ define dso_local signext i16 @ld_disjoint_align64_int16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int16_t_uint8_t:
@ -262,7 +262,7 @@ define dso_local signext i16 @ld_disjoint_align64_int16_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -278,7 +278,7 @@ define dso_local signext i16 @ld_cst_align16_int16_t_uint8_t() {
; CHECK-LABEL: ld_cst_align16_int16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
@ -292,7 +292,7 @@ define dso_local signext i16 @ld_cst_align32_int16_t_uint8_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
@ -307,7 +307,7 @@ define dso_local signext i16 @ld_cst_align64_int16_t_uint8_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int16_t_uint8_t:
@ -316,7 +316,7 @@ define dso_local signext i16 @ld_cst_align64_int16_t_uint8_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
@ -1550,7 +1550,7 @@ define dso_local zeroext i16 @ld_0_uint16_t_uint8_t(i64 %ptr) {
; CHECK-LABEL: ld_0_uint16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
@ -1564,7 +1564,7 @@ define dso_local zeroext i16 @ld_align16_uint16_t_uint8_t(i8* nocapture readonly
; CHECK-LABEL: ld_align16_uint16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -1579,7 +1579,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint8_t:
@ -1587,7 +1587,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -1603,7 +1603,7 @@ define dso_local zeroext i16 @ld_align64_uint16_t_uint8_t(i8* nocapture readonly
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint16_t_uint8_t:
@ -1612,7 +1612,7 @@ define dso_local zeroext i16 @ld_align64_uint16_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -1626,7 +1626,7 @@ define dso_local zeroext i16 @ld_reg_uint16_t_uint8_t(i8* nocapture readonly %pt
; CHECK-LABEL: ld_reg_uint16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -1641,7 +1641,7 @@ define dso_local zeroext i16 @ld_or_uint16_t_uint8_t(i64 %ptr, i8 zeroext %off)
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -1658,7 +1658,7 @@ define dso_local zeroext i16 @ld_not_disjoint16_uint16_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -1674,7 +1674,7 @@ define dso_local zeroext i16 @ld_disjoint_align16_uint16_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -1692,7 +1692,7 @@ define dso_local zeroext i16 @ld_not_disjoint32_uint16_t_uint8_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -1710,7 +1710,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
@ -1720,7 +1720,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
@ -1730,7 +1730,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -1750,7 +1750,7 @@ define dso_local zeroext i16 @ld_not_disjoint64_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint16_t_uint8_t:
@ -1761,7 +1761,7 @@ define dso_local zeroext i16 @ld_not_disjoint64_uint16_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -1779,7 +1779,7 @@ define dso_local zeroext i16 @ld_disjoint_align64_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint16_t_uint8_t:
@ -1789,7 +1789,7 @@ define dso_local zeroext i16 @ld_disjoint_align64_uint16_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -1805,7 +1805,7 @@ define dso_local zeroext i16 @ld_cst_align16_uint16_t_uint8_t() {
; CHECK-LABEL: ld_cst_align16_uint16_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
@ -1819,7 +1819,7 @@ define dso_local zeroext i16 @ld_cst_align32_uint16_t_uint8_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
@ -1834,7 +1834,7 @@ define dso_local zeroext i16 @ld_cst_align64_uint16_t_uint8_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint16_t_uint8_t:
@ -1843,7 +1843,7 @@ define dso_local zeroext i16 @ld_cst_align64_uint16_t_uint8_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
@ -2184,7 +2184,7 @@ define dso_local zeroext i16 @ld_0_uint16_t_uint16_t(i64 %ptr) {
; CHECK-LABEL: ld_0_uint16_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
@ -2197,7 +2197,7 @@ define dso_local zeroext i16 @ld_align16_uint16_t_uint16_t(i8* nocapture readonl
; CHECK-LABEL: ld_align16_uint16_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -2212,7 +2212,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonl
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint16_t:
@ -2220,7 +2220,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonl
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -2236,7 +2236,7 @@ define dso_local zeroext i16 @ld_align64_uint16_t_uint16_t(i8* nocapture readonl
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint16_t_uint16_t:
@ -2245,7 +2245,7 @@ define dso_local zeroext i16 @ld_align64_uint16_t_uint16_t(i8* nocapture readonl
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -2259,7 +2259,7 @@ define dso_local zeroext i16 @ld_reg_uint16_t_uint16_t(i8* nocapture readonly %p
; CHECK-LABEL: ld_reg_uint16_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -2274,7 +2274,7 @@ define dso_local zeroext i16 @ld_or_uint16_t_uint16_t(i64 %ptr, i8 zeroext %off)
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -2290,7 +2290,7 @@ define dso_local zeroext i16 @ld_not_disjoint16_uint16_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -2305,7 +2305,7 @@ define dso_local zeroext i16 @ld_disjoint_align16_uint16_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -2322,7 +2322,7 @@ define dso_local zeroext i16 @ld_not_disjoint32_uint16_t_uint16_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -2339,7 +2339,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
@ -2349,7 +2349,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
@ -2359,7 +2359,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -2378,7 +2378,7 @@ define dso_local zeroext i16 @ld_not_disjoint64_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint16_t_uint16_t:
@ -2389,7 +2389,7 @@ define dso_local zeroext i16 @ld_not_disjoint64_uint16_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -2406,7 +2406,7 @@ define dso_local zeroext i16 @ld_disjoint_align64_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint16_t_uint16_t:
@ -2416,7 +2416,7 @@ define dso_local zeroext i16 @ld_disjoint_align64_uint16_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -2431,7 +2431,7 @@ define dso_local zeroext i16 @ld_cst_align16_uint16_t_uint16_t() {
; CHECK-LABEL: ld_cst_align16_uint16_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
@ -2444,7 +2444,7 @@ define dso_local zeroext i16 @ld_cst_align32_uint16_t_uint16_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
@ -2458,7 +2458,7 @@ define dso_local zeroext i16 @ld_cst_align64_uint16_t_uint16_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint16_t_uint16_t:
@ -2467,7 +2467,7 @@ define dso_local zeroext i16 @ld_cst_align64_uint16_t_uint16_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096

View File

@ -23,7 +23,7 @@ define dso_local signext i32 @ld_0_int32_t_uint8_t(i64 %ptr) {
; CHECK-LABEL: ld_0_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
@ -37,7 +37,7 @@ define dso_local signext i32 @ld_align16_int32_t_uint8_t(i8* nocapture readonly
; CHECK-LABEL: ld_align16_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -52,7 +52,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint8_t(i8* nocapture readonly
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int32_t_uint8_t:
@ -60,7 +60,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -76,7 +76,7 @@ define dso_local signext i32 @ld_align64_int32_t_uint8_t(i8* nocapture readonly
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int32_t_uint8_t:
@ -85,7 +85,7 @@ define dso_local signext i32 @ld_align64_int32_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -99,7 +99,7 @@ define dso_local signext i32 @ld_reg_int32_t_uint8_t(i8* nocapture readonly %ptr
; CHECK-LABEL: ld_reg_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -114,7 +114,7 @@ define dso_local signext i32 @ld_or_int32_t_uint8_t(i64 %ptr, i8 zeroext %off) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -131,7 +131,7 @@ define dso_local signext i32 @ld_not_disjoint16_int32_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -147,7 +147,7 @@ define dso_local signext i32 @ld_disjoint_align16_int32_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -165,7 +165,7 @@ define dso_local signext i32 @ld_not_disjoint32_int32_t_uint8_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -183,7 +183,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint8_t:
@ -193,7 +193,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint8_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint8_t:
@ -203,7 +203,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint8_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -223,7 +223,7 @@ define dso_local signext i32 @ld_not_disjoint64_int32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_uint8_t:
@ -234,7 +234,7 @@ define dso_local signext i32 @ld_not_disjoint64_int32_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -252,7 +252,7 @@ define dso_local signext i32 @ld_disjoint_align64_int32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int32_t_uint8_t:
@ -262,7 +262,7 @@ define dso_local signext i32 @ld_disjoint_align64_int32_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -278,7 +278,7 @@ define dso_local signext i32 @ld_cst_align16_int32_t_uint8_t() {
; CHECK-LABEL: ld_cst_align16_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
@ -292,7 +292,7 @@ define dso_local signext i32 @ld_cst_align32_int32_t_uint8_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
@ -307,7 +307,7 @@ define dso_local signext i32 @ld_cst_align64_int32_t_uint8_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_uint8_t:
@ -316,7 +316,7 @@ define dso_local signext i32 @ld_cst_align64_int32_t_uint8_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
@ -635,7 +635,7 @@ define dso_local signext i32 @ld_0_int32_t_uint16_t(i64 %ptr) {
; CHECK-LABEL: ld_0_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
@ -649,7 +649,7 @@ define dso_local signext i32 @ld_align16_int32_t_uint16_t(i8* nocapture readonly
; CHECK-LABEL: ld_align16_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -665,7 +665,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint16_t(i8* nocapture readonly
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int32_t_uint16_t:
@ -673,7 +673,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint16_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -690,7 +690,7 @@ define dso_local signext i32 @ld_align64_int32_t_uint16_t(i8* nocapture readonly
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int32_t_uint16_t:
@ -699,7 +699,7 @@ define dso_local signext i32 @ld_align64_int32_t_uint16_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -714,7 +714,7 @@ define dso_local signext i32 @ld_reg_int32_t_uint16_t(i8* nocapture readonly %pt
; CHECK-LABEL: ld_reg_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -730,7 +730,7 @@ define dso_local signext i32 @ld_or_int32_t_uint16_t(i64 %ptr, i8 zeroext %off)
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -747,7 +747,7 @@ define dso_local signext i32 @ld_not_disjoint16_int32_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -763,7 +763,7 @@ define dso_local signext i32 @ld_disjoint_align16_int32_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -781,7 +781,7 @@ define dso_local signext i32 @ld_not_disjoint32_int32_t_uint16_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -799,7 +799,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint16_t:
@ -809,7 +809,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint16_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint16_t:
@ -819,7 +819,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint16_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -839,7 +839,7 @@ define dso_local signext i32 @ld_not_disjoint64_int32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_uint16_t:
@ -850,7 +850,7 @@ define dso_local signext i32 @ld_not_disjoint64_int32_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -868,7 +868,7 @@ define dso_local signext i32 @ld_disjoint_align64_int32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int32_t_uint16_t:
@ -878,7 +878,7 @@ define dso_local signext i32 @ld_disjoint_align64_int32_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -894,7 +894,7 @@ define dso_local signext i32 @ld_cst_align16_int32_t_uint16_t() {
; CHECK-LABEL: ld_cst_align16_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
@ -908,7 +908,7 @@ define dso_local signext i32 @ld_cst_align32_int32_t_uint16_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
@ -923,7 +923,7 @@ define dso_local signext i32 @ld_cst_align64_int32_t_uint16_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_uint16_t:
@ -932,7 +932,7 @@ define dso_local signext i32 @ld_cst_align64_int32_t_uint16_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
@ -1860,7 +1860,7 @@ define dso_local zeroext i32 @ld_0_uint32_t_uint8_t(i64 %ptr) {
; CHECK-LABEL: ld_0_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
@ -1874,7 +1874,7 @@ define dso_local zeroext i32 @ld_align16_uint32_t_uint8_t(i8* nocapture readonly
; CHECK-LABEL: ld_align16_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -1889,7 +1889,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint8_t:
@ -1897,7 +1897,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -1913,7 +1913,7 @@ define dso_local zeroext i32 @ld_align64_uint32_t_uint8_t(i8* nocapture readonly
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint32_t_uint8_t:
@ -1922,7 +1922,7 @@ define dso_local zeroext i32 @ld_align64_uint32_t_uint8_t(i8* nocapture readonly
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -1936,7 +1936,7 @@ define dso_local zeroext i32 @ld_reg_uint32_t_uint8_t(i8* nocapture readonly %pt
; CHECK-LABEL: ld_reg_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -1951,7 +1951,7 @@ define dso_local zeroext i32 @ld_or_uint32_t_uint8_t(i64 %ptr, i8 zeroext %off)
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -1968,7 +1968,7 @@ define dso_local zeroext i32 @ld_not_disjoint16_uint32_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -1984,7 +1984,7 @@ define dso_local zeroext i32 @ld_disjoint_align16_uint32_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -2002,7 +2002,7 @@ define dso_local zeroext i32 @ld_not_disjoint32_uint32_t_uint8_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -2020,7 +2020,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
@ -2030,7 +2030,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
@ -2040,7 +2040,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -2060,7 +2060,7 @@ define dso_local zeroext i32 @ld_not_disjoint64_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_uint8_t:
@ -2071,7 +2071,7 @@ define dso_local zeroext i32 @ld_not_disjoint64_uint32_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -2089,7 +2089,7 @@ define dso_local zeroext i32 @ld_disjoint_align64_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint32_t_uint8_t:
@ -2099,7 +2099,7 @@ define dso_local zeroext i32 @ld_disjoint_align64_uint32_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -2115,7 +2115,7 @@ define dso_local zeroext i32 @ld_cst_align16_uint32_t_uint8_t() {
; CHECK-LABEL: ld_cst_align16_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
@ -2129,7 +2129,7 @@ define dso_local zeroext i32 @ld_cst_align32_uint32_t_uint8_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
@ -2144,7 +2144,7 @@ define dso_local zeroext i32 @ld_cst_align64_uint32_t_uint8_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_uint8_t:
@ -2153,7 +2153,7 @@ define dso_local zeroext i32 @ld_cst_align64_uint32_t_uint8_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
@ -2494,7 +2494,7 @@ define dso_local zeroext i32 @ld_0_uint32_t_uint16_t(i64 %ptr) {
; CHECK-LABEL: ld_0_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
@ -2508,7 +2508,7 @@ define dso_local zeroext i32 @ld_align16_uint32_t_uint16_t(i8* nocapture readonl
; CHECK-LABEL: ld_align16_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -2524,7 +2524,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonl
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint16_t:
@ -2532,7 +2532,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonl
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -2549,7 +2549,7 @@ define dso_local zeroext i32 @ld_align64_uint32_t_uint16_t(i8* nocapture readonl
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint32_t_uint16_t:
@ -2558,7 +2558,7 @@ define dso_local zeroext i32 @ld_align64_uint32_t_uint16_t(i8* nocapture readonl
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -2573,7 +2573,7 @@ define dso_local zeroext i32 @ld_reg_uint32_t_uint16_t(i8* nocapture readonly %p
; CHECK-LABEL: ld_reg_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -2589,7 +2589,7 @@ define dso_local zeroext i32 @ld_or_uint32_t_uint16_t(i64 %ptr, i8 zeroext %off)
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -2606,7 +2606,7 @@ define dso_local zeroext i32 @ld_not_disjoint16_uint32_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -2622,7 +2622,7 @@ define dso_local zeroext i32 @ld_disjoint_align16_uint32_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -2640,7 +2640,7 @@ define dso_local zeroext i32 @ld_not_disjoint32_uint32_t_uint16_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -2658,7 +2658,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
@ -2668,7 +2668,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
@ -2678,7 +2678,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -2698,7 +2698,7 @@ define dso_local zeroext i32 @ld_not_disjoint64_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_uint16_t:
@ -2709,7 +2709,7 @@ define dso_local zeroext i32 @ld_not_disjoint64_uint32_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -2727,7 +2727,7 @@ define dso_local zeroext i32 @ld_disjoint_align64_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint32_t_uint16_t:
@ -2737,7 +2737,7 @@ define dso_local zeroext i32 @ld_disjoint_align64_uint32_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -2753,7 +2753,7 @@ define dso_local zeroext i32 @ld_cst_align16_uint32_t_uint16_t() {
; CHECK-LABEL: ld_cst_align16_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
@ -2767,7 +2767,7 @@ define dso_local zeroext i32 @ld_cst_align32_uint32_t_uint16_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
@ -2782,7 +2782,7 @@ define dso_local zeroext i32 @ld_cst_align64_uint32_t_uint16_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_uint16_t:
@ -2791,7 +2791,7 @@ define dso_local zeroext i32 @ld_cst_align64_uint32_t_uint16_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096

View File

@ -23,7 +23,7 @@ define dso_local i64 @ld_0_int64_t_uint8_t(i64 %ptr) {
; CHECK-LABEL: ld_0_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
@ -37,7 +37,7 @@ define dso_local i64 @ld_align16_int64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_align16_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -52,7 +52,7 @@ define dso_local i64 @ld_align32_int64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int64_t_uint8_t:
@ -60,7 +60,7 @@ define dso_local i64 @ld_align32_int64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -76,7 +76,7 @@ define dso_local i64 @ld_align64_int64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int64_t_uint8_t:
@ -85,7 +85,7 @@ define dso_local i64 @ld_align64_int64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -99,7 +99,7 @@ define dso_local i64 @ld_reg_int64_t_uint8_t(i8* nocapture readonly %ptr, i64 %o
; CHECK-LABEL: ld_reg_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -114,7 +114,7 @@ define dso_local i64 @ld_or_int64_t_uint8_t(i64 %ptr, i8 zeroext %off) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -131,7 +131,7 @@ define dso_local i64 @ld_not_disjoint16_int64_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -147,7 +147,7 @@ define dso_local i64 @ld_disjoint_align16_int64_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -165,7 +165,7 @@ define dso_local i64 @ld_not_disjoint32_int64_t_uint8_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -183,7 +183,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint8_t:
@ -193,7 +193,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint8_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint8_t:
@ -203,7 +203,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint8_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -223,7 +223,7 @@ define dso_local i64 @ld_not_disjoint64_int64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_uint8_t:
@ -234,7 +234,7 @@ define dso_local i64 @ld_not_disjoint64_int64_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -252,7 +252,7 @@ define dso_local i64 @ld_disjoint_align64_int64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int64_t_uint8_t:
@ -262,7 +262,7 @@ define dso_local i64 @ld_disjoint_align64_int64_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -278,7 +278,7 @@ define dso_local i64 @ld_cst_align16_int64_t_uint8_t() {
; CHECK-LABEL: ld_cst_align16_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
@ -292,7 +292,7 @@ define dso_local i64 @ld_cst_align32_int64_t_uint8_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
@ -307,7 +307,7 @@ define dso_local i64 @ld_cst_align64_int64_t_uint8_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_uint8_t:
@ -316,7 +316,7 @@ define dso_local i64 @ld_cst_align64_int64_t_uint8_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
@ -635,7 +635,7 @@ define dso_local i64 @ld_0_int64_t_uint16_t(i64 %ptr) {
; CHECK-LABEL: ld_0_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
@ -649,7 +649,7 @@ define dso_local i64 @ld_align16_int64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_align16_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -665,7 +665,7 @@ define dso_local i64 @ld_align32_int64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int64_t_uint16_t:
@ -673,7 +673,7 @@ define dso_local i64 @ld_align32_int64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -690,7 +690,7 @@ define dso_local i64 @ld_align64_int64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int64_t_uint16_t:
@ -699,7 +699,7 @@ define dso_local i64 @ld_align64_int64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -714,7 +714,7 @@ define dso_local i64 @ld_reg_int64_t_uint16_t(i8* nocapture readonly %ptr, i64 %
; CHECK-LABEL: ld_reg_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -730,7 +730,7 @@ define dso_local i64 @ld_or_int64_t_uint16_t(i64 %ptr, i8 zeroext %off) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -747,7 +747,7 @@ define dso_local i64 @ld_not_disjoint16_int64_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -763,7 +763,7 @@ define dso_local i64 @ld_disjoint_align16_int64_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -781,7 +781,7 @@ define dso_local i64 @ld_not_disjoint32_int64_t_uint16_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -799,7 +799,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint16_t:
@ -809,7 +809,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint16_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint16_t:
@ -819,7 +819,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint16_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -839,7 +839,7 @@ define dso_local i64 @ld_not_disjoint64_int64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_uint16_t:
@ -850,7 +850,7 @@ define dso_local i64 @ld_not_disjoint64_int64_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -868,7 +868,7 @@ define dso_local i64 @ld_disjoint_align64_int64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int64_t_uint16_t:
@ -878,7 +878,7 @@ define dso_local i64 @ld_disjoint_align64_int64_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -894,7 +894,7 @@ define dso_local i64 @ld_cst_align16_int64_t_uint16_t() {
; CHECK-LABEL: ld_cst_align16_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
@ -908,7 +908,7 @@ define dso_local i64 @ld_cst_align32_int64_t_uint16_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
@ -923,7 +923,7 @@ define dso_local i64 @ld_cst_align64_int64_t_uint16_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_uint16_t:
@ -932,7 +932,7 @@ define dso_local i64 @ld_cst_align64_int64_t_uint16_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
@ -2148,7 +2148,7 @@ define dso_local i64 @ld_0_uint64_t_uint8_t(i64 %ptr) {
; CHECK-LABEL: ld_0_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
@ -2162,7 +2162,7 @@ define dso_local i64 @ld_align16_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_align16_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -2177,7 +2177,7 @@ define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint8_t:
@ -2185,7 +2185,7 @@ define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -2201,7 +2201,7 @@ define dso_local i64 @ld_align64_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint64_t_uint8_t:
@ -2210,7 +2210,7 @@ define dso_local i64 @ld_align64_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -2224,7 +2224,7 @@ define dso_local i64 @ld_reg_uint64_t_uint8_t(i8* nocapture readonly %ptr, i64 %
; CHECK-LABEL: ld_reg_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -2239,7 +2239,7 @@ define dso_local i64 @ld_or_uint64_t_uint8_t(i64 %ptr, i8 zeroext %off) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -2256,7 +2256,7 @@ define dso_local i64 @ld_not_disjoint16_uint64_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -2272,7 +2272,7 @@ define dso_local i64 @ld_disjoint_align16_uint64_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -2290,7 +2290,7 @@ define dso_local i64 @ld_not_disjoint32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -2308,7 +2308,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
@ -2318,7 +2318,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
@ -2328,7 +2328,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -2348,7 +2348,7 @@ define dso_local i64 @ld_not_disjoint64_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_uint8_t:
@ -2359,7 +2359,7 @@ define dso_local i64 @ld_not_disjoint64_uint64_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -2377,7 +2377,7 @@ define dso_local i64 @ld_disjoint_align64_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint64_t_uint8_t:
@ -2387,7 +2387,7 @@ define dso_local i64 @ld_disjoint_align64_uint64_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -2403,7 +2403,7 @@ define dso_local i64 @ld_cst_align16_uint64_t_uint8_t() {
; CHECK-LABEL: ld_cst_align16_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
@ -2417,7 +2417,7 @@ define dso_local i64 @ld_cst_align32_uint64_t_uint8_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
@ -2432,7 +2432,7 @@ define dso_local i64 @ld_cst_align64_uint64_t_uint8_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_uint8_t:
@ -2441,7 +2441,7 @@ define dso_local i64 @ld_cst_align64_uint64_t_uint8_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
@ -2760,7 +2760,7 @@ define dso_local i64 @ld_0_uint64_t_uint16_t(i64 %ptr) {
; CHECK-LABEL: ld_0_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
@ -2774,7 +2774,7 @@ define dso_local i64 @ld_align16_uint64_t_uint16_t(i8* nocapture readonly %ptr)
; CHECK-LABEL: ld_align16_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -2790,7 +2790,7 @@ define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint16_t:
@ -2798,7 +2798,7 @@ define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr)
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -2815,7 +2815,7 @@ define dso_local i64 @ld_align64_uint64_t_uint16_t(i8* nocapture readonly %ptr)
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint64_t_uint16_t:
@ -2824,7 +2824,7 @@ define dso_local i64 @ld_align64_uint64_t_uint16_t(i8* nocapture readonly %ptr)
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -2839,7 +2839,7 @@ define dso_local i64 @ld_reg_uint64_t_uint16_t(i8* nocapture readonly %ptr, i64
; CHECK-LABEL: ld_reg_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -2855,7 +2855,7 @@ define dso_local i64 @ld_or_uint64_t_uint16_t(i64 %ptr, i8 zeroext %off) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -2872,7 +2872,7 @@ define dso_local i64 @ld_not_disjoint16_uint64_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -2888,7 +2888,7 @@ define dso_local i64 @ld_disjoint_align16_uint64_t_uint16_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -2906,7 +2906,7 @@ define dso_local i64 @ld_not_disjoint32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -2924,7 +2924,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
@ -2934,7 +2934,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
@ -2944,7 +2944,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -2964,7 +2964,7 @@ define dso_local i64 @ld_not_disjoint64_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_uint16_t:
@ -2975,7 +2975,7 @@ define dso_local i64 @ld_not_disjoint64_uint64_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -2993,7 +2993,7 @@ define dso_local i64 @ld_disjoint_align64_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint64_t_uint16_t:
@ -3003,7 +3003,7 @@ define dso_local i64 @ld_disjoint_align64_uint64_t_uint16_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -3019,7 +3019,7 @@ define dso_local i64 @ld_cst_align16_uint64_t_uint16_t() {
; CHECK-LABEL: ld_cst_align16_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
@ -3033,7 +3033,7 @@ define dso_local i64 @ld_cst_align32_uint64_t_uint16_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
@ -3048,7 +3048,7 @@ define dso_local i64 @ld_cst_align64_uint64_t_uint16_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_uint16_t:
@ -3057,7 +3057,7 @@ define dso_local i64 @ld_cst_align64_uint64_t_uint16_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096

View File

@ -1244,7 +1244,7 @@ define dso_local zeroext i8 @ld_0_uint8_t_uint8_t(i64 %ptr) {
; CHECK-LABEL: ld_0_uint8_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
@ -1257,7 +1257,7 @@ define dso_local zeroext i8 @ld_align16_uint8_t_uint8_t(i8* nocapture readonly %
; CHECK-LABEL: ld_align16_uint8_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@ -1271,7 +1271,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint8_t:
@ -1279,7 +1279,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
@ -1294,7 +1294,7 @@ define dso_local zeroext i8 @ld_align64_uint8_t_uint8_t(i8* nocapture readonly %
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint8_t_uint8_t:
@ -1303,7 +1303,7 @@ define dso_local zeroext i8 @ld_align64_uint8_t_uint8_t(i8* nocapture readonly %
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
@ -1316,7 +1316,7 @@ define dso_local zeroext i8 @ld_reg_uint8_t_uint8_t(i8* nocapture readonly %ptr,
; CHECK-LABEL: ld_reg_uint8_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
@ -1330,7 +1330,7 @@ define dso_local zeroext i8 @ld_or_uint8_t_uint8_t(i64 %ptr, i8 zeroext %off) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@ -1346,7 +1346,7 @@ define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@ -1361,7 +1361,7 @@ define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_uint8_t(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@ -1378,7 +1378,7 @@ define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_uint8_t(i64 %ptr) {
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@ -1395,7 +1395,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
@ -1405,7 +1405,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
@ -1415,7 +1415,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
@ -1434,7 +1434,7 @@ define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_uint8_t:
@ -1445,7 +1445,7 @@ define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@ -1462,7 +1462,7 @@ define dso_local zeroext i8 @ld_disjoint_align64_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint8_t_uint8_t:
@ -1472,7 +1472,7 @@ define dso_local zeroext i8 @ld_disjoint_align64_uint8_t_uint8_t(i64 %ptr) {
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
@ -1487,7 +1487,7 @@ define dso_local zeroext i8 @ld_cst_align16_uint8_t_uint8_t() {
; CHECK-LABEL: ld_cst_align16_uint8_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
@ -1500,7 +1500,7 @@ define dso_local zeroext i8 @ld_cst_align32_uint8_t_uint8_t() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
; CHECK-NEXT: clrldi r3, r3, 32
; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
@ -1514,7 +1514,7 @@ define dso_local zeroext i8 @ld_cst_align64_uint8_t_uint8_t() {
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_uint8_t:
@ -1523,7 +1523,7 @@ define dso_local zeroext i8 @ld_cst_align64_uint8_t_uint8_t() {
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096

View File

@ -24,6 +24,8 @@ define signext i8 @atomic_load_i8_unordered(i8 *%a) nounwind {
; RV32IA-LABEL: atomic_load_i8_unordered:
; RV32IA: # %bb.0:
; RV32IA-NEXT: lb a0, 0(a0)
; RV32IA-NEXT: slli a0, a0, 24
; RV32IA-NEXT: srai a0, a0, 24
; RV32IA-NEXT: ret
;
; RV64I-LABEL: atomic_load_i8_unordered:
@ -41,6 +43,8 @@ define signext i8 @atomic_load_i8_unordered(i8 *%a) nounwind {
; RV64IA-LABEL: atomic_load_i8_unordered:
; RV64IA: # %bb.0:
; RV64IA-NEXT: lb a0, 0(a0)
; RV64IA-NEXT: slli a0, a0, 56
; RV64IA-NEXT: srai a0, a0, 56
; RV64IA-NEXT: ret
%1 = load atomic i8, i8* %a unordered, align 1
ret i8 %1
@ -62,6 +66,8 @@ define signext i16 @atomic_load_i16_unordered(i16 *%a) nounwind {
; RV32IA-LABEL: atomic_load_i16_unordered:
; RV32IA: # %bb.0:
; RV32IA-NEXT: lh a0, 0(a0)
; RV32IA-NEXT: slli a0, a0, 16
; RV32IA-NEXT: srai a0, a0, 16
; RV32IA-NEXT: ret
;
; RV64I-LABEL: atomic_load_i16_unordered:
@ -79,6 +85,8 @@ define signext i16 @atomic_load_i16_unordered(i16 *%a) nounwind {
; RV64IA-LABEL: atomic_load_i16_unordered:
; RV64IA: # %bb.0:
; RV64IA-NEXT: lh a0, 0(a0)
; RV64IA-NEXT: slli a0, a0, 48
; RV64IA-NEXT: srai a0, a0, 48
; RV64IA-NEXT: ret
%1 = load atomic i16, i16* %a unordered, align 2
ret i16 %1
@ -114,6 +122,7 @@ define signext i32 @atomic_load_i32_unordered(i32 *%a) nounwind {
; RV64IA-LABEL: atomic_load_i32_unordered:
; RV64IA: # %bb.0:
; RV64IA-NEXT: lw a0, 0(a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = load atomic i32, i32* %a unordered, align 4
ret i32 %1
@ -2268,6 +2277,7 @@ define signext i32 @atomicrmw_xchg_i32_monotonic(i32* %a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_xchg_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amoswap.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw xchg i32* %a, i32 %b monotonic
ret i32 %1
@ -2303,6 +2313,7 @@ define signext i32 @atomicrmw_add_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_add_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amoadd.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw add i32* %a, i32 %b monotonic
ret i32 %1
@ -2340,6 +2351,7 @@ define signext i32 @atomicrmw_sub_i32_monotonic(i32* %a, i32 %b) nounwind {
; RV64IA: # %bb.0:
; RV64IA-NEXT: neg a1, a1
; RV64IA-NEXT: amoadd.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw sub i32* %a, i32 %b monotonic
ret i32 %1
@ -2375,6 +2387,7 @@ define signext i32 @atomicrmw_and_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_and_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amoand.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw and i32* %a, i32 %b monotonic
ret i32 %1
@ -2423,7 +2436,7 @@ define signext i32 @atomicrmw_nand_i32_monotonic(i32* %a, i32 %b) nounwind {
; RV64IA-NEXT: sc.w a3, a3, (a0)
; RV64IA-NEXT: bnez a3, .LBB29_1
; RV64IA-NEXT: # %bb.2:
; RV64IA-NEXT: mv a0, a2
; RV64IA-NEXT: sext.w a0, a2
; RV64IA-NEXT: ret
%1 = atomicrmw nand i32* %a, i32 %b monotonic
ret i32 %1
@ -2459,6 +2472,7 @@ define signext i32 @atomicrmw_or_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_or_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amoor.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw or i32* %a, i32 %b monotonic
ret i32 %1
@ -2494,6 +2508,7 @@ define signext i32 @atomicrmw_xor_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_xor_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amoxor.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw xor i32* %a, i32 %b monotonic
ret i32 %1
@ -2584,6 +2599,7 @@ define signext i32 @atomicrmw_max_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_max_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw max i32* %a, i32 %b monotonic
ret i32 %1
@ -2674,6 +2690,7 @@ define signext i32 @atomicrmw_min_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_min_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw min i32* %a, i32 %b monotonic
ret i32 %1
@ -2764,6 +2781,7 @@ define signext i32 @atomicrmw_umax_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_umax_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw umax i32* %a, i32 %b monotonic
ret i32 %1
@ -2854,6 +2872,7 @@ define signext i32 @atomicrmw_umin_i32_monotonic(i32 *%a, i32 %b) nounwind {
; RV64IA-LABEL: atomicrmw_umin_i32_monotonic:
; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.w a0, a1, (a0)
; RV64IA-NEXT: sext.w a0, a0
; RV64IA-NEXT: ret
%1 = atomicrmw umin i32* %a, i32 %b monotonic
ret i32 %1