forked from OSchip/llvm-project
[SystemZ] Enable the use of MVC for frame-to-frame spills
...now that the problem that prompted the restriction has been fixed. The original spill-02.py was a compromise because at the time I couldn't find an example that actually failed without the two scavenging slots. The version included here did. llvm-svn: 185701
This commit is contained in:
Richard Sandiford
parent
b204431106
commit
8976ea72ab
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@ -363,18 +363,11 @@ SystemZInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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// not valid in cases where the two memories partially overlap; however,
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// that is not a problem here, because we know that one of the memories
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// is a full frame index.
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//
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// For now we punt if the load or store is also to a frame index.
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// In that case we might end up eliminating both of them to out-of-range
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// offsets, which might then force the register scavenger to spill two
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// other registers. The backend can only handle one such scavenger spill
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// at a time.
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if (OpNum == 0 && MI->hasOneMemOperand()) {
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MachineMemOperand *MMO = *MI->memoperands_begin();
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if (MMO->getSize() == Size && !MMO->isVolatile()) {
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// Handle conversion of loads.
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if (isSimpleBD12Move(MI, SystemZII::SimpleBDXLoad) &&
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!MI->getOperand(1).isFI()) {
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if (isSimpleBD12Move(MI, SystemZII::SimpleBDXLoad)) {
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uint64_t Offset = 0;
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MachineMemOperand *FrameMMO = getFrameMMO(MF, FrameIndex, Offset,
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MachineMemOperand::MOStore);
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@ -384,8 +377,7 @@ SystemZInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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.addMemOperand(FrameMMO).addMemOperand(MMO);
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}
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// Handle conversion of stores.
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if (isSimpleBD12Move(MI, SystemZII::SimpleBDXStore) &&
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!MI->getOperand(1).isFI()) {
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if (isSimpleBD12Move(MI, SystemZII::SimpleBDXStore)) {
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uint64_t Offset = 0;
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MachineMemOperand *FrameMMO = getFrameMMO(MF, FrameIndex, Offset,
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MachineMemOperand::MOLoad);
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@ -1,46 +1,73 @@
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# Test cases where we spill from one frame index to another, both of which
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# would be out of range of MVC. At present we don't use MVC in this case.
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# are out of range of MVC, and both of which need emergency spill slots.
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# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
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# There are 8 usable call-saved GPRs. The first 160 bytes of the frame
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# are needed for the ABI call frame, and a further 8 bytes are needed
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# for the emergency spill slot. That means we will have at least one
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# out-of-range slot if:
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#
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# count == (4096 - 168) / 8 + 8 + 1 == 500
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#
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# Add in some extra just to be sure.
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#
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# CHECK: f1:
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# CHECK-NOT: mvc
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# CHECK: %fallthru
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# CHECK-DAG: stg [[REG1:%r[0-9]+]], 8168(%r15)
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# CHECK-DAG: stg [[REG2:%r[0-9]+]], 8176(%r15)
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# CHECK-DAG: lay [[REG3:%r[0-9]+]], 8192(%r15)
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# CHECK-DAG: lay [[REG4:%r[0-9]+]], 4096(%r15)
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# CHECK: mvc 0(8,[[REG3]]), 4088([[REG4]])
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# CHECK-DAG: lg [[REG1]], 8168(%r15)
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# CHECK-DAG: lg [[REG2]], 8176(%r15)
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# CHECK: %skip
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# CHECK: br %r14
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count = 510
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print 'declare void @foo(i64 *%base0, i64 *%base1)'
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# Arrange for %foo's spill slot to be at 8184(%r15) and the alloca area to be at
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# 8192(%r15). The two emergency spill slots live below that, so this requires
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# the first 8168 bytes to be used for the call. 160 of these bytes are
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# allocated for the ABI frame. There are also 5 argument registers, one of
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# which is used as a base pointer.
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args = (8168 - 160) / 8 + (5 - 1)
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print 'declare i64 *@foo(i64 *%s)' % (', i64' * args)
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print 'declare void @bar(i64 *)'
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print ''
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print 'define void @f1() {'
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print 'define i64 @f1(i64 %foo) {'
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print 'entry:'
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for i in range(2):
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print ' %%alloc%d = alloca [%d x i64]' % (i, count / 2)
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print (' %%base%d = getelementptr [%d x i64] * %%alloc%d, i64 0, i64 0'
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% (i, count / 2, i))
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print ' call void @foo(i64 *%base0, i64 *%base1)'
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# Make the allocation big, so that it goes at the top of the frame.
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print ' %array = alloca [1000 x i64]'
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print ' %area = getelementptr [1000 x i64] *%array, i64 0, i64 0'
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print ' %%base = call i64 *@foo(i64 *%%area%s)' % (', i64 0' * args)
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print ''
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# Make sure all GPRs are used. One is needed for the stack pointer and
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# another for %base, so we need 14 live values.
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count = 14
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for i in range(count):
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print ' %%ptr%d = getelementptr i64 *%%base%d, i64 %d' % (i, i % 2, i / 2)
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print ' %%val%d = load i64 *%%ptr%d' % (i, i)
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print ' %%ptr%d = getelementptr i64 *%%base, i64 %d' % (i, i / 2)
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print ' %%val%d = load volatile i64 *%%ptr%d' % (i, i)
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print ''
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print ' call void @foo(i64 *%base0, i64 *%base1)'
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print ''
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# Encourage the register allocator to give preference to these %vals
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# by using them several times.
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for j in range(4):
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for i in range(count):
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print ' store volatile i64 %%val%d, i64 *%%ptr%d' % (i, i)
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print ''
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for i in range (count):
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print ' store i64 %%val%d, i64 *%%ptr%d' % (i, i)
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# Copy the incoming argument, which we expect to be spilled, to the frame
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# index for the alloca area. Also throw in a volatile store, so that this
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# block cannot be reordered with the surrounding code.
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print ' %cond = icmp eq i64 %val0, %val1'
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print ' br i1 %cond, label %skip, label %fallthru'
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print ''
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print 'fallthru:'
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print ' store i64 %foo, i64 *%area'
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print ' store volatile i64 %val0, i64 *%ptr0'
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print ' br label %skip'
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print ''
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print 'skip:'
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print ''
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print ' call void @foo(i64 *%base0, i64 *%base1)'
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print ''
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print ' ret void'
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# Use each %val a few more times to emphasise the point, and to make sure
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# that they are live across the store of %foo.
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for j in range(4):
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for i in range(count):
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print ' store volatile i64 %%val%d, i64 *%%ptr%d' % (i, i)
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print ''
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print ' call void @bar(i64 *%area)'
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print ' ret i64 0'
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print '}'
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