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[FastISel][AArch64] Add support for fabs intrinsic. 

Lower the llvm.fabs intrinsic to the 'fabs' MI instruction.

This fixes rdar://problem/18946552.

llvm-svn: 221729
This commit is contained in:
Juergen Ributzka 2014-11-11 23:10:44 +00:00
parent 97b45874bf
commit 89441b0dd8
2 changed files with 45 additions and 0 deletions
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26
llvm/lib/Target/AArch64/AArch64FastISel.cpp
View File

@ -3299,6 +3299,32 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
updateValueMap(II, CLI.ResultReg);
return true;
}
case Intrinsic::fabs: {
MVT VT;
if (!isTypeLegal(II->getType(), VT))
return false;
unsigned Opc;
switch (VT.SimpleTy) {
default:
return false;
case MVT::f32:
Opc = AArch64::FABSSr;
break;
case MVT::f64:
Opc = AArch64::FABSDr;
break;
}
unsigned SrcReg = getRegForValue(II->getOperand(0));
if (!SrcReg)
return false;
bool SrcRegIsKill = hasTrivialKill(II->getOperand(0));
unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
.addReg(SrcReg, getKillRegState(SrcRegIsKill));
updateValueMap(II, ResultReg);
return true;
}
case Intrinsic::trap: {
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::BRK))
.addImm(1);

19
llvm/test/CodeGen/AArch64/fast-isel-intrinsic.ll Normal file
View File

@ -0,0 +1,19 @@
; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s | FileCheck %s
define float @fabs_f32(float %a) {
; CHECK-LABEL: fabs_f32
; CHECK: fabs s0, s0
%1 = call float @llvm.fabs.f32(float %a)
ret float %1
}
define double @fabs_f64(double %a) {
; CHECK-LABEL: fabs_f64
; CHECK: fabs d0, d0
%1 = call double @llvm.fabs.f64(double %a)
ret double %1
}
declare double @llvm.fabs.f64(double)
declare float @llvm.fabs.f32(float)