forked from OSchip/llvm-project
Fix an X86-64 abi bug. We now compile:
void foo(short); void bar(unsigned short A) { foo(A); } into: _bar: subq $8, %rsp movswl %di, %edi call _foo addq $8, %rsp ret instead of: _bar: subq $8, %rsp call _foo addq $8, %rsp ret Testcase here: test/CodeGen/X86/x86-64-shortint.ll llvm-svn: 34615
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@ -1301,12 +1301,6 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
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unsigned NumIntRegs = 0; // Int regs used for parameter passing.
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unsigned NumXMMRegs = 0; // XMM regs used for parameter passing.
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static const unsigned GPR8ArgRegs[] = {
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X86::DIL, X86::SIL, X86::DL, X86::CL, X86::R8B, X86::R9B
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};
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static const unsigned GPR16ArgRegs[] = {
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X86::DI, X86::SI, X86::DX, X86::CX, X86::R8W, X86::R9W
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};
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static const unsigned GPR32ArgRegs[] = {
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X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
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};
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@ -1366,6 +1360,15 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
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for (unsigned i = 0; i != NumOps; ++i) {
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SDOperand Arg = Op.getOperand(5+2*i);
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MVT::ValueType ArgVT = Arg.getValueType();
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unsigned ArgFlags =cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
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if (MVT::isInteger(ArgVT) && ArgVT < MVT::i32) {
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// Promote the integer to 32 bits. If the input type is signed use a
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// sign extend, otherwise use a zero extend.
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unsigned ExtOpc = (ArgFlags & 1) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
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Arg = DAG.getNode(ExtOpc, MVT::i32, Arg);
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ArgVT = MVT::i32;
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}
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switch (ArgVT) {
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default: assert(0 && "Unexpected ValueType for argument!");
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@ -1376,10 +1379,10 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
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if (NumIntRegs < 6) {
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unsigned Reg = 0;
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switch (ArgVT) {
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default: break;
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case MVT::i8: Reg = GPR8ArgRegs[NumIntRegs]; break;
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case MVT::i16: Reg = GPR16ArgRegs[NumIntRegs]; break;
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case MVT::i32: Reg = GPR32ArgRegs[NumIntRegs]; break;
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default: assert(0 && "Unknown integer size!");
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case MVT::i32:
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Reg = GPR32ArgRegs[NumIntRegs];
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break;
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case MVT::i64: Reg = GPR64ArgRegs[NumIntRegs]; break;
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}
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RegsToPass.push_back(std::make_pair(Reg, Arg));
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