forked from OSchip/llvm-project
X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses]
llvm-svn: 170523
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@ -15934,8 +15934,8 @@ static SDValue PerformLOADCombine(SDNode *N, SelectionDAG &DAG,
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// TODO: It is possible to support ZExt by zeroing the undef values
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// during the shuffle phase or after the shuffle.
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if (RegVT.isVector() && RegVT.isInteger() &&
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(Ext == ISD::EXTLOAD && Subtarget->hasSSSE3() ||
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Ext == ISD::SEXTLOAD && Subtarget->hasSSE41())){
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((Ext == ISD::EXTLOAD && Subtarget->hasSSSE3()) ||
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(Ext == ISD::SEXTLOAD && Subtarget->hasSSE41()))){
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assert(MemVT != RegVT && "Cannot extend to the same type");
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assert(MemVT.isVector() && "Must load a vector from memory");
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