From 89209462fe7083f4e46013411bf500018754c60a Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Wed, 19 Dec 2012 10:12:48 +0000 Subject: [PATCH] X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses] llvm-svn: 170523 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index fee9d932e522..93ea3721fe25 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -15934,8 +15934,8 @@ static SDValue PerformLOADCombine(SDNode *N, SelectionDAG &DAG, // TODO: It is possible to support ZExt by zeroing the undef values // during the shuffle phase or after the shuffle. if (RegVT.isVector() && RegVT.isInteger() && - (Ext == ISD::EXTLOAD && Subtarget->hasSSSE3() || - Ext == ISD::SEXTLOAD && Subtarget->hasSSE41())){ + ((Ext == ISD::EXTLOAD && Subtarget->hasSSSE3()) || + (Ext == ISD::SEXTLOAD && Subtarget->hasSSE41()))){ assert(MemVT != RegVT && "Cannot extend to the same type"); assert(MemVT.isVector() && "Must load a vector from memory");