forked from OSchip/llvm-project
[PowerPC] Fix wrong codegen when stack pointer has to realign in prologue
Current powerpc backend generates wrong code sequence if stack pointer has to realign if -fstack-clash-protection enabled. When probing in prologue, backend should generate a subtraction instruction rather than a `stux` instruction to realign the stack pointer. This patch is part of fix of https://bugs.llvm.org/show_bug.cgi?id=46759. Differential Revision: https://reviews.llvm.org/D84218
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@ -1466,11 +1466,10 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
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.addImm(0)
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.addImm(32 - Log2(MaxAlign))
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.addImm(31);
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BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::STDUX : PPC::STWUX),
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BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::SUBFC8 : PPC::SUBFC),
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SPReg)
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.addReg(FPReg)
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.addReg(SPReg)
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.addReg(ScratchReg);
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.addReg(ScratchReg)
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.addReg(SPReg);
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}
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// Probe residual part.
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if (NegResidualSize) {
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@ -12,7 +12,7 @@ define void @foo(i32 %vla_size) #0 {
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; CHECK-LE-NEXT: mr r12, r1
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; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-LE-NEXT: clrldi r0, r12, 53
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; CHECK-LE-NEXT: stdux r12, r1, r0
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; CHECK-LE-NEXT: subc r1, r1, r0
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; CHECK-LE-NEXT: stdu r12, -2048(r1)
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; CHECK-LE-NEXT: stdu r12, -4096(r1)
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; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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