forked from OSchip/llvm-project
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829572cdca
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89078880f2
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@ -97,11 +97,12 @@ class F3_2<bits<2> opVal, bits<6> op3val, dag ops,
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// floating-point
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class F3_3<bits<2> opVal, bits<6> op3val, bits<9> opfval, dag ops,
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string asmstr> : F3 {
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string asmstr, list<dag> pattern> : F3 {
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bits<5> rs2;
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dag OperandList = ops;
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let AsmString = asmstr;
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let Pattern = pattern;
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let op = opVal;
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let op3 = op3val;
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@ -485,68 +485,68 @@ def WRYri : F3_2<2, 0b110000,
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// Convert Integer to Floating-point Instructions, p. 141
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def FITOS : F3_3<2, 0b110100, 0b011000100,
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(ops FPRegs:$dst, FPRegs:$src),
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"fitos $src, $dst">;
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"fitos $src, $dst", []>;
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def FITOD : F3_3<2, 0b110100, 0b011001000,
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(ops DFPRegs:$dst, DFPRegs:$src),
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"fitod $src, $dst">;
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"fitod $src, $dst", []>;
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// Convert Floating-point to Integer Instructions, p. 142
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def FSTOI : F3_3<2, 0b110100, 0b011010001,
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(ops FPRegs:$dst, FPRegs:$src),
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"fstoi $src, $dst">;
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"fstoi $src, $dst", []>;
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def FDTOI : F3_3<2, 0b110100, 0b011010010,
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(ops DFPRegs:$dst, DFPRegs:$src),
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"fdtoi $src, $dst">;
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"fdtoi $src, $dst", []>;
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// Convert between Floating-point Formats Instructions, p. 143
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def FSTOD : F3_3<2, 0b110100, 0b011001001,
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(ops DFPRegs:$dst, FPRegs:$src),
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"fstod $src, $dst">;
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"fstod $src, $dst", []>;
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def FDTOS : F3_3<2, 0b110100, 0b011000110,
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(ops FPRegs:$dst, DFPRegs:$src),
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"fdtos $src, $dst">;
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"fdtos $src, $dst", []>;
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// Floating-point Move Instructions, p. 144
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def FMOVS : F3_3<2, 0b110100, 0b000000001,
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(ops FPRegs:$dst, FPRegs:$src),
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"fmovs $src, $dst">;
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"fmovs $src, $dst", []>;
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def FNEGS : F3_3<2, 0b110100, 0b000000101,
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(ops FPRegs:$dst, FPRegs:$src),
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"fnegs $src, $dst">;
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"fnegs $src, $dst", []>;
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def FABSS : F3_3<2, 0b110100, 0b000001001,
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(ops FPRegs:$dst, FPRegs:$src),
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"fabss $src, $dst">;
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"fabss $src, $dst", []>;
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// Floating-point Add and Subtract Instructions, p. 146
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def FADDS : F3_3<2, 0b110100, 0b001000001,
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(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
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"fadds $src1, $src2, $dst">;
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"fadds $src1, $src2, $dst", []>;
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def FADDD : F3_3<2, 0b110100, 0b001000010,
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(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
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"faddd $src1, $src2, $dst">;
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"faddd $src1, $src2, $dst", []>;
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def FSUBS : F3_3<2, 0b110100, 0b001000101,
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(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
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"fsubs $src1, $src2, $dst">;
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"fsubs $src1, $src2, $dst", []>;
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def FSUBD : F3_3<2, 0b110100, 0b001000110,
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(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
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"fsubd $src1, $src2, $dst">;
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"fsubd $src1, $src2, $dst", []>;
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// Floating-point Multiply and Divide Instructions, p. 147
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def FMULS : F3_3<2, 0b110100, 0b001001001,
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(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
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"fmuls $src1, $src2, $dst">;
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"fmuls $src1, $src2, $dst", []>;
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def FMULD : F3_3<2, 0b110100, 0b001001010,
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(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
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"fmuld $src1, $src2, $dst">;
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"fmuld $src1, $src2, $dst", []>;
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def FSMULD : F3_3<2, 0b110100, 0b001101001,
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(ops DFPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
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"fsmuld $src1, $src2, $dst">;
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"fsmuld $src1, $src2, $dst", []>;
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def FDIVS : F3_3<2, 0b110100, 0b001001101,
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(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
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"fdivs $src1, $src2, $dst">;
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"fdivs $src1, $src2, $dst", []>;
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def FDIVD : F3_3<2, 0b110100, 0b001001110,
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(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
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"fdivd $src1, $src2, $dst">;
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"fdivd $src1, $src2, $dst", []>;
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// Floating-point Compare Instructions, p. 148
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// Note: the 2nd template arg is different for these guys.
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@ -555,10 +555,10 @@ def FDIVD : F3_3<2, 0b110100, 0b001001110,
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// is modelled with a forced noop after the instruction.
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def FCMPS : F3_3<2, 0b110101, 0b001010001,
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(ops FPRegs:$src1, FPRegs:$src2),
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"fcmps $src1, $src2\n\tnop">;
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"fcmps $src1, $src2\n\tnop", []>;
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def FCMPD : F3_3<2, 0b110101, 0b001010010,
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(ops DFPRegs:$src1, DFPRegs:$src2),
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"fcmpd $src1, $src2\n\tnop">;
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"fcmpd $src1, $src2\n\tnop", []>;
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//===----------------------------------------------------------------------===//
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// Non-Instruction Patterns
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