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Make isScalarToVector to return false if the node is a scalar. This will prevent 

DAGCombine from making an illegal transformation of bitcast of a scalar to a
vector into a scalar_to_vector.

llvm-svn: 119819
This commit is contained in:
Mon P Wang 2010-11-19 19:08:12 +00:00
parent 55964f6a75
commit 88ff56caa3
2 changed files with 29 additions and 0 deletions
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2
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -199,6 +199,8 @@ bool ISD::isScalarToVector(const SDNode *N) {
if (N->getOperand(0).getOpcode() == ISD::UNDEF)
return false;
unsigned NumElems = N->getNumOperands();
if (NumElems == 1)
return false;
for (unsigned i = 1; i < NumElems; ++i) {
SDValue V = N->getOperand(i);
if (V.getOpcode() != ISD::UNDEF)

27
llvm/test/CodeGen/X86/bc-extract.ll Normal file
View File

@ -0,0 +1,27 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
define float @extractFloat1() nounwind {
entry:
; CHECK: 1065353216
%tmp0 = bitcast <1 x double> <double 0x000000003F800000> to <2 x float>
%tmp1 = extractelement <2 x float> %tmp0, i32 0
ret float %tmp1
}
define float @extractFloat2() nounwind {
entry:
; CHECK: pxor %xmm0, %xmm0
%tmp4 = bitcast <1 x double> <double 0x000000003F800000> to <2 x float>
%tmp5 = extractelement <2 x float> %tmp4, i32 1
ret float %tmp5
}
define i32 @extractInt2() nounwind {
entry:
; CHECK: xorl %eax, %eax
%tmp4 = bitcast <1 x i64> <i64 256> to <2 x i32>
%tmp5 = extractelement <2 x i32> %tmp4, i32 1
ret i32 %tmp5
}