From 88fbbcaa302a1889d0ca32004420a63f2a9f8f75 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Thu, 1 May 2014 10:08:36 +0000 Subject: [PATCH] [mips] Removed two-operand alias for sllv, sr[al]v, rotrv, dsllv, dsr[al]v, and drotrv GAS doesn't actually accept these particular cases. The mnemonic without the trailing 'v' still supports two-operand aliases. llvm-svn: 207740 --- llvm/lib/Target/Mips/MipsInstrInfo.td | 4 +--- llvm/test/MC/Mips/mips1/valid.s | 3 --- llvm/test/MC/Mips/mips2/valid.s | 3 --- llvm/test/MC/Mips/mips3/valid.s | 6 ------ llvm/test/MC/Mips/mips32/invalid-mips32r2.s | 1 - llvm/test/MC/Mips/mips32/valid.s | 3 --- llvm/test/MC/Mips/mips32r2/valid.s | 4 ---- llvm/test/MC/Mips/mips4/valid.s | 6 ------ llvm/test/MC/Mips/mips5/valid.s | 6 ------ llvm/test/MC/Mips/mips64/invalid-mips64r2.s | 1 - llvm/test/MC/Mips/mips64/valid.s | 6 ------ llvm/test/MC/Mips/mips64r2/valid.s | 8 -------- 12 files changed, 1 insertion(+), 50 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index a1c49c0ccf9f..8bb1a9b0bccb 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -496,9 +496,7 @@ class shift_rotate_reg { - let TwoOperandAliasConstraint = "$rt = $rd"; -} + opstr>; // Load Upper Imediate class LoadUpper: diff --git a/llvm/test/MC/Mips/mips1/valid.s b/llvm/test/MC/Mips/mips1/valid.s index baf698cba550..925ee7637d10 100644 --- a/llvm/test/MC/Mips/mips1/valid.s +++ b/llvm/test/MC/Mips/mips1/valid.s @@ -70,7 +70,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -79,12 +78,10 @@ sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips2/valid.s b/llvm/test/MC/Mips/mips2/valid.s index 112b1ac385fa..96e55a59787f 100644 --- a/llvm/test/MC/Mips/mips2/valid.s +++ b/llvm/test/MC/Mips/mips2/valid.s @@ -82,7 +82,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -93,12 +92,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips3/valid.s b/llvm/test/MC/Mips/mips3/valid.s index 34f1919fc6f8..79443923ad6c 100644 --- a/llvm/test/MC/Mips/mips3/valid.s +++ b/llvm/test/MC/Mips/mips3/valid.s @@ -50,20 +50,17 @@ dsll $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] - dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14] dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf] dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf] - dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17] dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17] dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa] dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa] dsrl $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe] dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe] - dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16] dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 @@ -135,7 +132,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -146,12 +142,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips32/invalid-mips32r2.s b/llvm/test/MC/Mips/mips32/invalid-mips32r2.s index 5cb8c659bfde..cc5ae239a11b 100644 --- a/llvm/test/MC/Mips/mips32/invalid-mips32r2.s +++ b/llvm/test/MC/Mips/mips32/invalid-mips32r2.s @@ -18,7 +18,6 @@ pause # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled - rotrv $1,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled rotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled sdxc1 $f11,$t2($t6) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled seb $t9,$t7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/llvm/test/MC/Mips/mips32/valid.s b/llvm/test/MC/Mips/mips32/valid.s index 52e5c2610e54..2abdd780b33c 100644 --- a/llvm/test/MC/Mips/mips32/valid.s +++ b/llvm/test/MC/Mips/mips32/valid.s @@ -106,7 +106,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -117,12 +116,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s index 31c8174e40d0..e0cb86d02c95 100644 --- a/llvm/test/MC/Mips/mips32r2/valid.s +++ b/llvm/test/MC/Mips/mips32r2/valid.s @@ -117,7 +117,6 @@ rdhwr $sp,$11 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] - rotrv $1,$15 # CHECK: rotrv $1, $1, $15 # encoding: [0x01,0xe1,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] round.w.d $f6,$f4 round.w.s $f27,$f28 @@ -132,7 +131,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -143,12 +141,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s index 054e0e2271c7..1201346b8d1f 100644 --- a/llvm/test/MC/Mips/mips4/valid.s +++ b/llvm/test/MC/Mips/mips4/valid.s @@ -49,20 +49,17 @@ dsll $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] - dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14] dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf] dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf] - dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17] dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17] dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa] dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa] dsrl $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe] dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe] - dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16] dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 @@ -151,7 +148,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -162,12 +158,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips5/valid.s b/llvm/test/MC/Mips/mips5/valid.s index cbf7513407e4..94be22929f20 100644 --- a/llvm/test/MC/Mips/mips5/valid.s +++ b/llvm/test/MC/Mips/mips5/valid.s @@ -50,20 +50,17 @@ dsll $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] - dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14] dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf] dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf] - dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17] dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17] dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa] dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa] dsrl $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe] dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe] - dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16] dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 @@ -151,7 +148,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -162,12 +158,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips64/invalid-mips64r2.s b/llvm/test/MC/Mips/mips64/invalid-mips64r2.s index c343a8dd8370..fac06e4e11b5 100644 --- a/llvm/test/MC/Mips/mips64/invalid-mips64r2.s +++ b/llvm/test/MC/Mips/mips64/invalid-mips64r2.s @@ -9,7 +9,6 @@ drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled - drotrv $1,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/llvm/test/MC/Mips/mips64/valid.s b/llvm/test/MC/Mips/mips64/valid.s index 72203868352e..175a317055d0 100644 --- a/llvm/test/MC/Mips/mips64/valid.s +++ b/llvm/test/MC/Mips/mips64/valid.s @@ -54,20 +54,17 @@ dsll $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] - dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14] dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf] dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf] - dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17] dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17] dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa] dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa] dsrl $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe] dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe] - dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16] dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 @@ -164,7 +161,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -175,12 +171,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s index f64f42bb36be..86ed004dd78a 100644 --- a/llvm/test/MC/Mips/mips64r2/valid.s +++ b/llvm/test/MC/Mips/mips64r2/valid.s @@ -54,7 +54,6 @@ drotr $1,$14,15 # CHECK: drotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfa] drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfe] drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfe] - drotrv $1,$15 # CHECK: drotrv $1, $1, $15 # encoding: [0x01,0xe1,0x08,0x56] drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x56] dsbh $v1,$t6 dshd $v0,$sp @@ -63,20 +62,17 @@ dsll $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc] - dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14] dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14] dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb] dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb] dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf] dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf] - dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17] dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17] dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa] dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa] dsrl $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe] dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe] - dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16] dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16] dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 @@ -167,7 +163,6 @@ rdhwr $sp,$11 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] - rotrv $1,$15 # CHECK: rotrv $1, $1, $15 # encoding: [0x01,0xe1,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] round.l.d $f12,$f1 round.l.s $f25,$f5 @@ -188,7 +183,6 @@ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80] sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80] sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] - sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04] sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04] slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a] slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] @@ -199,12 +193,10 @@ sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] - srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] - srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06] srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4