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[AArch64] Promote f16 SELECT_CC CC operands when op is legal. 

SELECT_CC has the nasty property of having operands with unrelated
types. So if you do something like:

  f32 = select_cc f16, f16, f32, f32, cc

You'd only look for the action for <select_cc, f32>, but never f16.
If the types are all legal, but the op isn't (as for f16 on AArch64,
or for f128 on x86_64/AArch64?), then you get into trouble.
For f128, we have softenSetCCOperands to handle this case.

Similarly, for f16, we can directly promote the CC operands.

llvm-svn: 253344
This commit is contained in:
Ahmed Bougacha 2015-11-17 16:45:40 +00:00
parent af08e1bdf0
commit 88ddeae8bd
2 changed files with 34 additions and 1 deletions
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8
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -3887,7 +3887,13 @@ SDValue AArch64TargetLowering::LowerSELECT_CC(ISD::CondCode CC, SDValue LHS,
}
}
// Handle integers first.
// Also handle f16, for which we need to do a f32 comparison.
if (LHS.getValueType() == MVT::f16) {
LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS);
RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS);
}
// Next, handle integers.
if (LHS.getValueType().isInteger()) {
assert((LHS.getValueType() == RHS.getValueType()) &&
(LHS.getValueType() == MVT::i32 || LHS.getValueType() == MVT::i64));

27
llvm/test/CodeGen/AArch64/f16-instructions.ll
View File

@ -143,6 +143,33 @@ define half @test_select_cc(half %a, half %b, half %c, half %d) #0 {
ret half %r
}
; CHECK-LABEL: test_select_cc_f32_f16:
; CHECK-DAG: fcvt s2, h2
; CHECK-DAG: fcvt s3, h3
; CHECK-NEXT: fcmp s2, s3
; CHECK-NEXT: fcsel s0, s0, s1, ne
; CHECK-NEXT: ret
define float @test_select_cc_f32_f16(float %a, float %b, half %c, half %d) #0 {
%cc = fcmp une half %c, %d
%r = select i1 %cc, float %a, float %b
ret float %r
}
; CHECK-LABEL: test_select_cc_f16_f32:
; CHECK-DAG: fcvt s0, h0
; CHECK-DAG: fcvt s1, h1
; CHECK-DAG: fcmp s2, s3
; CHECK-DAG: cset w8, ne
; CHECK-NEXT: cmp w8, #0
; CHECK-NEXT: fcsel s0, s0, s1, ne
; CHECK-NEXT: fcvt h0, s0
; CHECK-NEXT: ret
define half @test_select_cc_f16_f32(half %a, half %b, float %c, float %d) #0 {
%cc = fcmp une float %c, %d
%r = select i1 %cc, half %a, half %b
ret half %r
}
; CHECK-LABEL: test_fcmp_une:
; CHECK-NEXT: fcvt s1, h1
; CHECK-NEXT: fcvt s0, h0